PIC18F2450 MICROCHIP [Microchip Technology], PIC18F2450 Datasheet - Page 68

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PIC18F2450

Manufacturer Part Number
PIC18F2450
Description
28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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PIC18F2450/4450
5.3.6
The STATUS register, shown in Register 5-2, contains
the arithmetic status of the ALU. As with any other SFR,
it can be the operand for any instruction.
If the STATUS register is the destination for an instruction
that affects the Z, DC, C, OV or N bits, the results of the
instruction are not written; instead, the STATUS register
is updated according to the instruction performed.
Therefore, the result of an instruction with the STATUS
register as its destination may be different than intended.
As an example, CLRF STATUS will set the Z bit and leave
the remaining Status bits unchanged (‘000u u1uu’).
REGISTER 5-2:
DS39760A-page 66
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-0
2:
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand. For rotate (RRF, RLF) instructions, this bit is loaded with either bit 4 or bit 3 of the source register.
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low-order bit of the
source register.
STATUS REGISTER
Unimplemented: Read as ‘0’
N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was
negative (ALU MSB = 1).
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit
magnitude which causes the sign bit (bit 7 of the result) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/Borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
U-0
STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
(2)
(1)
Advance Information
R/W-x
N
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
It is recommended that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the STATUS
register because these instructions do not affect the Z,
C, DC, OV or N bits in the STATUS register.
For other instructions that do not affect Status bits, see
the instruction set summaries in Table 19-2 and
Table 19-3.
OV
Note:
The C and DC bits operate as the Borrow
and Digit Borrow bits, respectively, in
subtraction.
R/W-x
Z
© 2006 Microchip Technology Inc.
x = Bit is unknown
R/W-x
DC
(1)
R/W-x
C
(2)
bit 0

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