PIC18F24J10-E/ML MICROCHIP [Microchip Technology], PIC18F24J10-E/ML Datasheet - Page 106
PIC18F24J10-E/ML
Manufacturer Part Number
PIC18F24J10-E/ML
Description
28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J10-EML.pdf
(358 pages)
- Current page: 106 of 358
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PIC18F45J10 FAMILY
TABLE 9-9:
DS39682C-page 104
RD0/PSP0/SCK2/
SCL2
RD1/PSP1/SDI2/
SDA2
RD2/PSP2/SDO2
RD3/PSP3/SS2
RD4/PSP4
RD5/PSP5/P1B
RD6/PSP6/P1C
RD7/PSP7/P1D
Legend:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
PORTD I/O SUMMARY
Function
SDO2
PSP0
SCK2
PSP1
SDA2
PSP2
PSP3
PSP4
PSP5
PSP6
PSP7
SCL2
SDI2
RD0
RD1
RD2
RD3
SS2
RD4
RD5
P1B
RD6
P1C
RD7
P1D
Setting
TRIS
0
1
x
x
0
1
0
1
0
1
x
x
1
1
1
0
1
x
x
0
0
1
x
x
1
0
1
x
x
0
1
x
x
0
0
1
x
x
0
0
1
x
x
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
2
C/SMB I
C/SMB I
Type
DIG
DIG
TTL
DIG
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
TTL
DIG
DIG
TTL
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
DIG
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
Preliminary
PSP read data output (LATD<0>); takes priority over port data.
SPI™ clock output (MSSP2 module); takes priority over port data.
PSP read data output (LATD<1>); takes priority over port data.
PSP read data output (LATD<2>); takes priority over port data.
SPI data output (MSSP2 module); takes priority over port data.
PSP read data output (LATD<3>); takes priority over port data.
PSP read data output (LATD<4>); takes priority over port data.
PSP read data output (LATD<5>); takes priority over port data.
ECCP1 Enhanced PWM output, channel B; takes priority over port and PSP
PSP read data output (LATD<6>); takes priority over port data.
ECCP1 Enhanced PWM output, channel C; takes priority over port and PSP
PSP read data output (LATD<7>); takes priority over port data.
ECCP1 Enhanced PWM output, channel D; takes priority over port and PSP
LATD<0> data output.
PORTD<0> data input.
PSP write data input.
SPI clock input (MSSP2 module).
I
LATD<1> data output.
PORTD<1> data input.
PSP write data input.
SPI data input (MSSP2 module).
I
LATD<2> data output.
PORTD<2> data input.
PSP write data input.
LATD<3> data output.
PORTD<3> data input.
PSP write data input.
Slave select input for MSSP2 (MSSP2 module).
LATD<4> data output.
PORTD<4> data input.
PSP write data input.
LATD<5> data output.
PORTD<5> data input.
PSP write data input.
data. May be configured for tri-state during Enhanced PWM shutdown events.
LATD<6> data output.
PORTD<6> data input.
PSP write data input.
data. May be configured for tri-state during Enhanced PWM shutdown events.
LATD<7> data output.
PORTD<7> data input.
PSP write data input.
data. May be configured for tri-state during Enhanced PWM shutdown events.
2
2
2
2
C™ clock output (MSSP2 module); takes priority over port data.
C clock input (MSSP2 module); input type depends on module setting.
C data output (MSSP2 module); takes priority over port data.
C data input (MSSP2 module); input type depends on module setting.
Description
I
2
C/SMB = I
© 2007 Microchip Technology Inc.
2
C/SMBus input buffer;
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