PIC18F24J10-E/ML MICROCHIP [Microchip Technology], PIC18F24J10-E/ML Datasheet - Page 213
![no-image](/images/no-image-200.jpg)
PIC18F24J10-E/ML
Manufacturer Part Number
PIC18F24J10-E/ML
Description
28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J10-EML.pdf
(358 pages)
- Current page: 213 of 358
- Download datasheet (6Mb)
REGISTER 17-3:
© 2007 Microchip Technology Inc.
bit 7
bit 6
bit 5-3
bit 2-0
ADCON2: A/D CONTROL REGISTER 2
Legend:
R = Readable bit
-n = Value at POR
bit 7
ADFM: A/D Result Format Select bit
1 = Right justified
0 = Left justified
Unimplemented: Read as ‘0’
ACQT2:ACQT0: A/D Acquisition Time Select bits
111 = 20 T
110 = 16 T
101 = 12 T
100 = 8 T
011 = 6 T
010 = 4 T
001 = 2 T
000 = 0 T
ADCS2:ADCS0: A/D Conversion Clock Select bits
111 = F
110 = F
101 = F
100 = F
011 = F
010 = F
001 = F
000 = F
R/W-0
ADFM
Note 1: If the A/D F
RC
OSC
OSC
OSC
RC
OSC
OSC
OSC
AD
AD
AD
AD
AD
AD
AD
AD
(clock derived from A/D RC oscillator)
(clock derived from A/D RC oscillator)
added before the A/D clock starts. This allows the SLEEP instruction to be executed
before starting a conversion.
/64
/16
/4
/32
/8
/2
(1)
U-0
—
RC
ACQT2
R/W-0
clock source is selected, a delay of one T
Preliminary
W = Writable bit
‘1’ = Bit is set
ACQT1
R/W-0
PIC18F45J10 FAMILY
ACQT0
(1)
(1)
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADCS2
R/W-0
CY
x = Bit is unknown
ADCS1
R/W-0
(instruction cycle) is
DS39682C-page 211
ADCS0
R/W-0
bit 0
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