PIC18F24J10-E/ML MICROCHIP [Microchip Technology], PIC18F24J10-E/ML Datasheet - Page 329

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PIC18F24J10-E/ML

Manufacturer Part Number
PIC18F24J10-E/ML
Description
28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
TABLE 23-25: A/D CONVERSION REQUIREMENTS
© 2007 Microchip Technology Inc.
130
131
132
135
Legend: TBD = To Be Determined
Note 1:
Param
No.
2:
3:
4:
T
T
T
T
Symbol
AD
CNV
ACQ
SWC
The time of the A/D clock period is dependent on the device frequency and the T
ADRES registers may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
A/D Clock Period
Conversion Time
(not including acquisition time) (Note 2)
Acquisition Time (Note 3)
Switching Time from Convert → Sample
Characteristic
DD
to V
SS
or V
SS
Preliminary
to V
DD
). The source impedance (R
CY
PIC18F45J10 FAMILY
cycle.
TBD
TBD
Min
0.7
1.4
11
(Note 4)
25.0
Max
12
1
(1)
Units
T
μs
μs
μs
μs
AD
S
) on the input channels is 50Ω.
T
A/D RC mode
-40°C to +85°C
0°C ≤ to ≤ +85°C
OSC
AD
based, V
clock divider.
Conditions
DS39682C-page 327
REF
≥ 2.0V

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