PIC18F24J10-E/ML MICROCHIP [Microchip Technology], PIC18F24J10-E/ML Datasheet - Page 18
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PIC18F24J10-E/ML
Manufacturer Part Number
PIC18F24J10-E/ML
Description
28/40/44-Pin High-Performance RISC Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F24J10-EML.pdf
(358 pages)
- Current page: 18 of 358
- Download datasheet (6Mb)
PIC18F45J10 FAMILY
TABLE 1-3:
DS39682C-page 16
MCLR
OSC1/CLKI
OSC2/CLKO
Legend: TTL = TTL compatible input
Note 1: Default assignment for CCP2 when configuration bit CCP2MX is set.
MCLR
OSC1
CLKI
OSC2
CLKO
2: Alternate assignment for CCP2 when configuration bit CCP2MX is cleared.
Pin Name
ST = Schmitt Trigger input with CMOS levels
O
= Output
PIC18F44J10/45J10 PINOUT I/O DESCRIPTIONS
PDIP
13
14
1
Pin Number
QFN TQFP
18
32
33
18
30
31
Type
Pin
O
O
I
I
I
Preliminary
Buffer
CMOS
Type
ST
—
—
—
CMOS = CMOS compatible input or output
I
P
Master Clear (input) or programming voltage (input).
Oscillator crystal or external clock input.
Oscillator crystal or clock output.
Master Clear (Reset) input. This pin is an active-low
Reset to the device.
Oscillator crystal input or external clock source input.
External clock source input. Always associated with
pin function OSC1. See related OSC2/CLKO pins.
Oscillator crystal output. Connects to crystal
or resonator in Crystal Oscillator mode.
In RC mode, OSC2 pin outputs CLKO which
has 1/4 the frequency of OSC1 and denotes
the instruction cycle rate.
= Input
= Power
Description
© 2007 Microchip Technology Inc.
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