LAN9221i SMSC [SMSC Corporation], LAN9221i Datasheet - Page 43
LAN9221i
Manufacturer Part Number
LAN9221i
Description
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9221I.pdf
(151 pages)
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High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
SMSC LAN9221/LAN9221i
EEDIO (OUTPUT)
EEDIO (OUTPUT)
EEDIO (INPUT)
EEDIO (INPUT)
EEDIO (OUTPUT)
EEDIO (INPUT)
EECLK
EECLK
EECS
EECS
READ (Read Location): This command will cause a read of the EEPROM location pointed to by EPC
Address (EPC_ADDR). The result of the read is available in the E2P_DATA register.
WRITE (Write Location): If erase/write operations are enabled in the EEPROM, this command will
cause the contents of the E2P_DATA register to be written to the EEPROM location selected by the
EPC Address field (EPC_ADDR). The EPC_TO bit is set if the EEPROM does not respond within
30ms.
WRAL (Write All): If erase/write operations are enabled in the EEPROM, this command will cause the
contents of the E2P_DATA register to be written to every EEPROM memory location. The EPC_TO bit
is set if the EEPROM does not respond within 30ms.
Table 3.9, "Required EECLK
each EEPROM operation.
EECLK
EECS
1
1
0
0
1
0
Figure 3.10 EEPROM WRITE Cycle
1
Figure 3.11 EEPROM WRAL Cycle
Figure 3.9 EEPROM READ Cycle
1
0
Cycles", shown below, shows the number of EECLK cycles required for
A6
1
0
DATASHEET
A6
43
A0
D7
D7
A0
D7
D0
D0
t
t
CSL
CSL
D0
Revision 2.6 (12-04-08)
t
CSL
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