LAN9221i SMSC [SMSC Corporation], LAN9221i Datasheet - Page 63
LAN9221i
Manufacturer Part Number
LAN9221i
Description
High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9221I.pdf
(151 pages)
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High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
SMSC LAN9221/LAN9221i
3.13.1
RX Slave PIO Operation
Using PIO mode, the host can either implement a polling or interrupt scheme to empty the received
packet out of the RX data FIFO. The host will remain in the idle state until it receives an indication
(interrupt or polling) that data is available in the RX data FIFO. The host will then read the RX status
FIFO to get the packet status, which will contain the packet length and any other status information.
The host should perform the proper number of reads, as indicated by the packet length plus the start
offset and the amount of optional padding added to the end of the frame, from the RX data FIFO.
Figure 3.18 Host Receive Routine Using Interrupts
Figure 3.19 Host Receive Routine with Polling
Last Packet
Last Packet
DATASHEET
RX_FIFO_
Read RX
Read RX
DWORD
Read RX
Read RX
DWORD
Packet
Packet
Status
Status
Read
Idle
init
INf
init
63
Valid Status DWORD
RX Interrupt
Not Last Packet
Not Last Packet
Revision 2.6 (12-04-08)
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