UJA1069TW24 NXP [NXP Semiconductors], UJA1069TW24 Datasheet - Page 47
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UJA1069TW24
Manufacturer Part Number
UJA1069TW24
Description
LIN fail-safe system basis chip
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.UJA1069TW24.pdf
(64 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UJA1069TW24/3VO
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
UJA1069TW24/5VO
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
Table 25.
T
voltages are defined with respect to ground. Positive currents flow into the IC.
[1]
[2]
[3]
UJA1069_3
Product data sheet
Symbol
I
I
TEST input; pin TEST
V
R
Temperature detection
T
RTLIN(pu)
LL
vj
j(warn)
th(TEST)
(pd)TEST
= 40 C to +150 C, V
All parameters are guaranteed over the virtual junction temperature range by design. Products are 100 % tested at 125 C ambient
temperature on wafer level (pretesting). Cased products are 100 % tested at 25 C ambient temperature (final testing). Both pretesting
and final testing use correlated test conditions to cover the specified temperature and power supply voltage range.
V
Not tested in production.
V1(nom)
Static characteristics
is 3 V, 3.3 V or 5 V, depending on the SBC version.
Parameter
RTLIN pull-up
current
LOW-level leakage
current
input threshold
voltage
pull-down resistor
high junction
temperature warning
level
BAT42
= 5.5 V to 52 V; V
…continued
Conditions
Active mode;
V
t > t
Off-line mode;
V
t < t
Off-line mode;
V
t > t
for entering Software
development mode;
T
for entering Forced normal
mode; T
between pin TEST and GND
j
RTLIN
RTLIN
RTLIN
= 25 C
LIN(dom)(det)
LIN(dom)(det)
LIN(dom)(det)
Rev. 03 — 10 September 2007
BAT14
= V
= V
= V
j
= 25 C
LIN
LIN
LIN
= 5.5 V to 27 V; V
= 0 V;
= 0 V;
= 0 V;
BAT42
[1]
Min
1
2
2
160
150
150
10
V
BAT14
LIN fail-safe system basis chip
1 V; unless otherwise specified. All
Typ
0
5
10
4
175
60
60
UJA1069
Max
+10
8
13.5
8
190
© NXP B.V. 2007. All rights reserved.
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V
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k
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C
A
A
A