MC68HC908LJ12CPB FREESCALE [Freescale Semiconductor, Inc], MC68HC908LJ12CPB Datasheet - Page 354

• Manufacturer Part Number: MC68HC908LJ12CPB
• Description: 8-bit microcontroller units
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

17.6.2 Data Direction Register D (DDRD)
MC68HC908LJ12
Freescale Semiconductor
NOTE:
NOTE:
—
Rev. 2.1
Address:
KBI[7:4] — Keyboard Interrupt Pins
Data direction register D determines whether each port D pin is an input
or an output. Writing a logic 1 to a DDRD bit enables the output buffer for
the corresponding port D pin; a logic 0 disables the output buffer.
For those devices packaged in a 52-pin LQFP, PTD0–PTD7 are not
connected. DDRD0–DDRD7 should be set to a 1 to configure
PTD0–PTD7 as outputs.
DDRD[7:0] — Data Direction Register D Bits
Avoid glitches on port D pins by writing to the port D data register before
changing data direction register D bits from 0 to 1.
the port D I/O logic.
Reset:
Read:
Write:
KBI[7:4] are input pins to the keyboard interrupt module. The
corresponding control bits, KBIE[7:4], in the keyboard interrupt enable
register, KBIER, select which port pins will be used as a keyboard
interrupt input and overrides any control from the port I/O logic. See
Section 19. Keyboard Interrupt Module (KBI)
These read/write bits control port D data direction. Reset clears
DDRD[7:0], configuring all port D pins as inputs.
1 = Corresponding port D pin configured as output
0 = Corresponding port D pin configured as input
DDRD7
$0007
Bit 7
Figure 17-13. Data Direction Register D (DDRD)
0
Input/Output (I/O) Ports
DDRD6
6
0
DDRD5
5
0
DDRD4
4
0
DDRD3
3
0
DDRD2
Figure 17-14
2
0
Input/Output (I/O) Ports
DDRD1
1
0
Technical Data
shows
DDRD0
Bit 0
0
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