MC68HC908LJ12CPB FREESCALE [Freescale Semiconductor, Inc], MC68HC908LJ12CPB Datasheet - Page 82

• Manufacturer Part Number: MC68HC908LJ12CPB
• Description: 8-bit microcontroller units
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

MC68HC908LJ12
Freescale Semiconductor
NOTE:
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Rev. 2.1
I — Interrupt Mask
To maintain M6805 Family compatibility, the upper byte of the index
register (H) is not stacked automatically. If the interrupt service routine
modifies H, then the user must stack and unstack H using the PSHH and
PULH instructions.
N — Negative Flag
Z — Zero Flag
The CPU sets the negative flag when an arithmetic operation, logic
operation, or data manipulation produces a negative result, setting
bit 7 of the result.
When the interrupt mask is set, all maskable CPU interrupts are
disabled. CPU interrupts are enabled when the interrupt mask is
cleared. When a CPU interrupt occurs, the interrupt mask is set
automatically after the CPU registers are saved on the stack, but
before the interrupt vector is fetched.
After the I bit is cleared, the highest-priority interrupt request is
serviced first.
A return-from-interrupt (RTI) instruction pulls the CPU registers from
the stack and restores the interrupt mask from the stack. After any
reset, the interrupt mask is set and can be cleared only by the clear
interrupt mask software instruction (CLI).
The CPU sets the zero flag when an arithmetic operation, logic
operation, or data manipulation produces a result of $00.
1 = Interrupts disabled
0 = Interrupts enabled
1 = Negative result
0 = Non-negative result
1 = Zero result
0 = Non-zero result
Central Processor Unit (CPU)
Central Processor Unit (CPU)
Technical Data
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