MC68HC908LJ12CPB FREESCALE [Freescale Semiconductor, Inc], MC68HC908LJ12CPB Datasheet - Page 73

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MC68HC908LJ12CPB

Manufacturer Part Number
MC68HC908LJ12CPB
Description
8-bit microcontroller units
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
Configuration Registers (CONFIG)
Technical Data
74
NOTE:
NOTE:
SSREC — Short Stop Recovery
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal oscillator, do not set the SSREC bit.
When the LVISTOP is enabled, the system stabilization time for power
on reset and long stop recovery (both 4096 ICLK cycles) gives a delay
longer than the enable time for the LVI. There is no period where the
MCU is not protected from a low power condition. However, when using
the short stop recovery configuration option, the 32 ICLK delay is less
than the LVI’s turn-on time and there exists a period in start-up where the
LVI is not protecting the MCU.
STOP — STOP Instruction Enable
COPD — COP Disable Bit
SSREC enables the CPU to exit stop mode with a delay of 32 ICLK
cycles instead of a 4096 ICLK cycle delay.
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
1 = Stop mode recovery after 32 ICLK cycles
0 = Stop mode recovery after 4096 ICLK cycles
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Configuration Registers (CONFIG)
(COP).)
Section 20. Computer
MC68HC908LJ12
Freescale Semiconductor
Rev. 2.1

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