AT89C51CC03U-S3SIM ATMEL [ATMEL Corporation], AT89C51CC03U-S3SIM Datasheet - Page 118
AT89C51CC03U-S3SIM
Manufacturer Part Number
AT89C51CC03U-S3SIM
Description
Enhanced 8-bit MCU with CAN Controller and Flash Memory
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT89C51CC03U-S3SIM.pdf
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AT89C51CC03
Table 63. CANPAGE Register
CANPAGE (S:B1h)
CAN Message Object Page Register
Reset Value = 0000 0000b
Table 64. CANCONCH Register
CANCONCH (S:B3h)
CAN Message Object Control and DLC Register
No default value after reset
CONCH 1
Number
Number
CHNB 3
Bit
Bit
7-4
2-0
7-6
3-0
7
7
3
5
4
Bit Mnemonic Description
Bit Mnemonic Description
CONCH 0
CHNB 2
CONCH1:0
CHNB3:0
INDX2:0
DLC3:0
RPLV
AINC
6
6
IDE
CHNB 1
Selection of Message Object Number
The available numbers are: 0 to 14 (see Figure 48).
Auto Increment of the Index (active low)
0 - auto-increment of the index (default value).
1 - non-auto-increment of the index.
Index
Byte location of the data field for the defined message object (see Figure 48).
Configuration of Message Object
CONCH1 CONCH0
Note: The user must re-write the configuration to enable the corresponding bit
in the CANEN1:2 registers.
Reply Valid
Used in the automatic reply mode after receiving a remote frame
0 - reply not ready.
1 - reply ready and valid.
Identifier Extension
0 - CAN standard rev 2.0 A (ident = 11 bits).
1 - CAN standard rev 2.0 B (ident = 29 bits).
Data Length Code
Number of Bytes in the data field of the message.
The range of DLC is from 0 up to 8.
This value is updated when a frame is received (data or remote frame).
If the expected DLC differs from the incoming DLC, a warning appears in the
CANSTCH register.
RPLV
5
5
0
0
1
1
0: disable
1: Launch transmission
0: Enable Reception
1: Enable Reception Buffer
CHNB 0
IDE
4
4
DLC 3
AINC
3
3
INDX2
DLC 2
2
2
4182I–CAN–06/05
INDX1
DLC 1
1
1
INDX0
DLC 0
0
0
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