STA333BW_11 STMICROELECTRONICS [STMicroelectronics], STA333BW_11 Datasheet - Page 31
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STA333BW_11
Manufacturer Part Number
STA333BW_11
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STA333BW_11.pdf
(67 pages)
- Current page: 31 of 67
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STA333BW
6.1.5
Configuration register E (addr 0x04)
Max power correction variable
Table 34.
Max power correction
Table 35.
Setting the MPC bit turns on special processing that corrects the STA333BW power device
at high power. This mode should lower the THD+N of a full FFX system at maximum power
output and slightly below. If enabled, MPC is operational in all output modes except tapered
(OM[1,0] = 01) and binary. When OCFG = 00, MPC has no effect on channels 3 and 4, the
line-out channels.
Noise-shaper bandwidth selection
Table 36.
AM mode enable
Table 37.
STA333BW features a FFX processing mode that minimizes the amount of noise generated
in frequency range of AM radio. This mode is intended for use when FFX is operating in a
device with an AM tuner active. The SNR of the FFX processing is reduced to approximately
83 dB in this mode, which is still greater than the SNR of AM radio.
0
1
2
3
Bit
Bit
Bit
Bit
SVE
D7
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Max power correction variable
Max power correction
Noise-shaper bandwidth selection
AM mode enable
0
0
ZCE
D6
RST
RST
1
0
1
RST
RST
NSBW
AME
MPCV
MPC
DCCV
D5
Name
Name
0
Doc ID 13773 Rev 3
Name
Name
PWMS
D4
0
1: third-order NS
0: fourth-order NS
0: normal FFX operation.
1: AM reduction mode FFX operation
0: use standard MPC coefficient
1: use MPCC bits for MPC coefficient
0: function disabled
1: enables power bridge correction for THD
reduction near maximum power output.
AME
D3
0
Description
Description
NSBW
Description
Description
D2
0
Register description
MPC
D1
1
MPCV
D0
0
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