STA333BW_11 STMICROELECTRONICS [STMicroelectronics], STA333BW_11 Datasheet - Page 48

• Manufacturer Part Number: STA333BW_11
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Register description
6.6.3
6.6.4
6.6.5
48/67
Limiter 2 attack / release rate (addr 0x14)
Limiter 2 attack / release threshold (addr 0x15)
Description
The STA333BW includes two independent limiter blocks. The purpose of the limiters is to
automatically reduce the dynamic range of a recording to prevent the outputs from clipping
in anticlipping mode or to actively reduce the dynamic range for a better listening
environment such as a night-time listening mode which is often needed for DVDs. The two
modes are selected via the DRC bit in
Each channel can be mapped to either limiter or not mapped, meaning that channel will clip
when 0 dBFS is exceeded. Each limiter looks at the present value of each channel that is
mapped to it, selects the maximum absolute value of all these channels, performs the
limiting algorithm on that value, and then if needed adjusts the gain of the mapped channels
in unison.
Figure 18. Basic limiter and volume flow diagram
The limiter attack thresholds are determined by the LxAT registers.
It is recommended in anticlipping mode to set this to 0 dBfs, which corresponds to the
maximum unclipped output power of a FFX amplifier. Since gain can be added digitally
within the STA333BW it is possible to exceed 0 dBfs or any other LxAT setting, when this
occurs, the limiter, when active, automatically starts reducing the gain. The rate at which the
gain is reduced when the attack threshold is exceeded is dependent upon the attack rate
register setting for that limiter. Gain reduction occurs on a peak-detect algorithm.
The limiter release thresholds are determined by the LxRT registers.
The release of limiter, when the gain is again increased, is dependent on a RMS-detect
algorithm. The output of the volume / limiter block is passed through a RMS filter. The output
of this filter is compared to the release threshold, determined by the Release Threshold
register. When the RMS filter output falls below the release threshold, the gain is again
increased at a rate dependent upon the Release Rate register. The gain can never be
increased past its set value and, therefore, the release only occurs if the limiter has already
L2AT3
L2A3
D7
D7
0
0
L2AT2
L2A2
D6
D6
1
1
GAIN / VOLUME
GAIN / VOLUME
INPUT
INPUT
L2AT1
L2A1
D5
D5
1
1
Doc ID 13773 Rev 3
GAIN
GAIN
L2AT0
L2A0
Configuration register E (addr 0x04) on page
D4
D4
0
0
ATTENUATION
ATTENUATION
LIMITER
LIMITER
+
+
L2RT3
L2R3
D3
D3
1
1
SATURATION
SATURATION
L2RT2
RMS
RMS
L2R2
D2
D2
0
0
OUTPUT
OUTPUT
L2RT1
L2R1
D1
D1
1
0
STA333BW
L2RT0
L2R0
31.
D0
D0
0
1