PX1011A-ELG NXP [NXP Semiconductors], PX1011A-ELG Datasheet - Page 12
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PX1011A-ELG
Manufacturer Part Number
PX1011A-ELG
Description
PCI Express stand-alone X1 PHY
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PX1011A-ELG.pdf
(32 pages)
Philips Semiconductors
PX1011A_PX1012A_2
Product data sheet
The PHY begins to loopback data when the MAC asserts RXDET_LOOPB while doing
normal data transmission. The PHY stops transmitting data from the PXPIPE interface,
and begins to loopback received symbols. While doing loopback, the PHY continues to
present received data on the PXPIPE interface.
The PHY stops looping back received data when the MAC de-asserts RXDET_LOOPB.
Transmission of data on the parallel interface begins immediately.
The timing diagram of
example, the receiver is receiving a repeating stream of bytes, Rx-a through Rx-z.
Similarly, the MAC is causing the PHY to transmit a repeating stream of bytes Tx-a
through Tx-z. When the MAC asserts RXDET_LOOPB to the PHY, the PHY begins to
loopback the received data to the differential TX_P and TX_N lines.
The timing diagram of
normal mode. As soon as the MAC detects an electrical idle ordered-set, the MAC
de-asserts RXDET_LOOPB, asserts TXIDLE and changes the POWERDOWN signals to
state P1.
Fig 6. Loopback start
•
•
The PHY continues to provide the received data on the PXPIPE interface, behaving
exactly like normal data reception.
The PHY transitions from normal transmission of data from the PXPIPE interface to
looping back the received data at a symbol boundary.
RXDET_LOOPB
RXDATA[7:0]
TXDATA[7:0]
TX_P, TX_N
RXCLK
TXCLK
Tx-m
Rx-c
Figure 6
Figure 7
Rev. 02 — 18 May 2006
shows example timing for beginning loopback. In this
shows an example of switching from loopback mode to
Tx-n
Rx-d
Tx-o
Rx-e
Tx-m
PX1011A/PX1012A
PCI Express stand-alone X1 PHY
Tx-p
Rx-f
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Tx-n
Tx-q
Rx-g
Rx-e
002aac174
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