PX1011A-ELG NXP [NXP Semiconductors], PX1011A-ELG Datasheet - Page 17
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PX1011A-ELG
Manufacturer Part Number
PX1011A-ELG
Description
PCI Express stand-alone X1 PHY
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.PX1011A-ELG.pdf
(32 pages)
Philips Semiconductors
PX1011A_PX1012A_2
Product data sheet
8.11 Polarity inversion
For an elastic buffer overflow, the overflow is signaled during the clock cycle where the
dropped symbol would have appeared in the data stream. In the timing diagram of
Figure
buffer overflows causing the symbol Rx-d to be discarded. The PHY drives RXSTATUS to
indicate buffer overflow during the clock cycle when Rx-d would have appeared on the
parallel interface.
To support lane polarity inversion, the PHY inverts received data when RXPOL is
asserted. The PHY begins data inversion within 20 symbols after RXPOL is asserted.
Fig 13. Elastic buffer underflow
Fig 14. Elastic buffer overflow
Fig 15. Polarity inversion
RXSTATUS2,
RXSTATUS1,
RXSTATUS0
RXDATA[7:0]
RXDATA[7:0]
RXSTATUS2,
RXSTATUS1,
RXSTATUS0
RXDATA[7:0]
14, the PHY is receiving a repeating set of symbols Rx-a through Rx-z. The elastic
RXVALID
RXVALID
RXVALID
RXCLK
RXCLK
RXCLK
RXPOL
Rx-a
000b
Rx-a
000b
D21.5
Rev. 02 — 18 May 2006
Rx-b
Rx-b
D21.5
Rx-c
Rx-c
PX1011A/PX1012A
PCI Express stand-alone X1 PHY
101b
110b
Rx-e
D10.2
EDB
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
000b
Rx-d
000b
Rx-f
D10.2
001aac783
001aac786
001aac782
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