HD6413003RVF RENESAS [Renesas Technology Corp], HD6413003RVF Datasheet - Page 368
HD6413003RVF
Manufacturer Part Number
HD6413003RVF
Description
microcontroller (MCU)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6413003RVF.pdf
(715 pages)
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Output pin
Output pin
— General register settings outside the counting range (H'0000 to GRA3)
Figure 10-42 Changing a General Register Setting by Buffer Transfer (Example 2)
H'0000
GRA3
Waveforms with a duty cycle of 0% or 100% can be output by setting a general register to
a value outside the counting range. When a buffer register is set to a value outside the
counting range, then later restored to a value within the counting range, the counting
direction (up or down) must be the same both times. See figure 10-42.
Settings can be made in this way by detecting GRA3 compare match or TCNT4
underflow before writing to the buffer register. They can also be made by using GRA3
compare match to activate the DMAC.
GR
GR
BR
Write during down-counting
0% duty cycle
350
Write during up-counting
100% duty cycle
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