HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 386
HD64F7050
Manufacturer Part Number
HD64F7050
Description
32-Bit RISC Microcomputer SuperH RISC engine Family/
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD64F7050.pdf
(841 pages)
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Section 12 Watchdog Timer (WDT)
12.4
12.4.1
If a timer counter increment clock pulse is generated during the T
TCNT, the write takes priority and the timer counter is not incremented (figure 12.8).
12.4.2
If the values of bits CKS2 to CKS0 are altered while the WDT is running, the count may
increment incorrectly. Always stop the watchdog timer (by clearing the TME bit to 0) before
changing the values of bits CKS2 to CKS0.
12.4.3
To prevent incorrect operation, always stop the watchdog timer (by clearing the TME bit to 0)
before switching between interval timer mode and watchdog timer mode.
Rev. 5.00 Jan 06, 2006 page 366 of 818
REJ09B0273-0500
Notes on Use
TCNT Write and Increment Contention
Changing CKS2 to CKS0 Bit Values
Changing between Watchdog Timer/Interval Timer Modes
write signal
input clock
Address
Internal
Figure 12.8 Contention between TCNT Write and Increment
TCNT
TCNT
CK
T
1
TCNT write cycle
TCNT address
N
T
2
Counter write data
T
3
3
state of a write cycle to the
M
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