HD64F7050 RENESAS [Renesas Technology Corp], HD64F7050 Datasheet - Page 482

• Manufacturer Part Number: HD64F7050
• Description: 32-Bit RISC Microcomputer SuperH RISC engine Family/
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 15 Compare Match Timer (CMT)
15.2
15.2.1
The compare match timer start register (CMSTR) is a 16-bit register that selects whether to
operate or halt the channel 0 and channel 1 counters (CMCNT). It is initialized to H'0000 by a
power-on reset and in standby modes.
Bits 15–2—Reserved: These bits always read as 0. The write value should always be 0.
Bit 1—Count Start 1 (STR1): Selects whether to operate or halt compare match timer counter 1.
Bit 1: STR1
0
1
Bit 0—Count Start 0 (STR0): Selects whether to operate or halt compare match timer counter 0.
Bit 0: STR0
0
1
Rev. 5.00 Jan 06, 2006 page 462 of 818
REJ09B0273-0500
Initial value:
Initial value:
Register Descriptions
Compare Match Timer Start Register (CMSTR)
R/W:
R/W:
Bit:
Bit:
15
—
—
R
R
0
7
0
Description
CMCNT1 count operation halted (initial value)
CMCNT1 count operation
Description
CMCNT0 count operation halted (initial value)
CMCNT0 count operation
14
—
—
R
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
STR1
R/W
—
R
9
0
1
0
STR0
R/W
—
R
8
0
0
0