HYB25D256160CC-5 QIMONDA [Qimonda AG], HYB25D256160CC-5 Datasheet - Page 31

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HYB25D256160CC-5

Manufacturer Part Number
HYB25D256160CC-5
Description
256-Mbit Double-Data-Rate SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HYB25D256160CC-5
Manufacturer:
SIEMENS
Quantity:
1
Rev. 2.3, 2007-03
03062006-8CCM-VPUW
Parameter
Operating Current: one bank; active/ precharge;
DQ, DM, and DQS inputs changing once per clock cycle; address and control inputs changing once every two
clock cycles.
Operating Current: one bank; active/read/precharge; Burst = 4;
Refer to the following page for detailed test conditions.
Precharge Power-Down Standby Current: all banks idle; power-down mode; CKE ≤ V
Precharge Floating Standby Current: CS ≥ V
CKE ≥ V
and DM.
Precharge Quiet Standby Current:CS ≥ V
control inputs stable at ≥ V
Active Power-Down Standby Current: one bank active; power-down mode;
CKE ≤ V
Active Standby Current: one bank active; CS ≥ V
inputs changing twice per clock cycle; address and control inputs changing once per clock cycle.
Operating Current: one bank active; Burst = 2; reads; continuous burst; address and control inputs changing
once per clock cycle; 50 % of data outputs changing on every clock edge; CL = 2 for DDR200 and DDR266A,
CL = 3 for DDR333;
Operating Current: one bank active; Burst = 2; writes; continuous burst; address and control inputs changing
once per clock cycle; 50 % of data outputs changing on every clock edge; CL = 2 for DDR200 and DDR266A,
CL = 3 for DDR333;
Auto-Refresh Current:
Self-Refresh Current: CKE ≤ 0.2 V; external clock on;
Operating Current: four bank; four bank interleaving with BL = 4; Refer to the following page for detailed test
conditions.
IHMIN
ILMAX
;
;
t
t
CK
CK
=
= t
t
CKMIN
CKMIN
t
t
CK
CK
=
=
t
, address and other control inputs changing once per clock cycle, V
RC
; V
t
t
IHMIN
CKMIN
CKMIN
=
IN
t
= V
RFCMIN
or ≤ V
; I
OUT
REF
, burst refresh
= 0 mA
ILMAX
for DQ, DQS and DM.
; V
IHMIN
IN
= V
IHMIN
, all banks idle; CKE ≥ V
IHMIN
t
RC
REF
, all banks idle;
=
; CKE ≥ V
for DQ, DQS and DM.
t
t
CK
RCMIN
=
31
t
;
CKMIN
t
CK
IHMIN
=
;
t
CKMIN
t
RC
IHMIN
=
;
t
RASMAX
;
t
CK
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
=
;
t
CK
t
256 Mbit Double-Data-Rate SDRAM
CKMIN
=
t
ILMAX
CKMIN
, address and other
IN
= V
;
; DQ, DM and DQS
t
CK
REF
= t
for DQ, DQS
CKMIN
Internet Data Sheet
I
TABLE 22
DD
Conditions
Symbol
I
I
I
I
I
I
I
I
I
I
I
I
DD0
DD1
DD2P
DD2F
DD2Q
DD3P
DD3N
DD4R
DD4W
DD5
DD6
DD7

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