HYB25D256160CC-5 QIMONDA [Qimonda AG], HYB25D256160CC-5 Datasheet - Page 7

• Manufacturer Part Number: HYB25D256160CC-5
• Description: 256-Mbit Double-Data-Rate SDRAM
• Manufacturer: QIMONDA [Qimonda AG]

2
The pin configuration of a DDR SDRAM is listed by function in
column are explained in
TSOP package in
Rev. 2.3, 2007-03
03062006-8CCM-VPUW
Ball#/Pin#
Clock Signals
G2, 45
G3, 46
H3, 44
Control Signals
H7, 23
G8, 22
G7, 21
H8, 24
Address Signals
J8, 26
J7, 27
K7, 29
L8, 30
L7, 31
M8, 32
M2, 35
L3, 36
L2, 37
K3, 38
K2, 39
J3, 40
K8, 28
J2, 41
H2, 42
F9, 17
Name
CK
CK
CKE
RAS
CAS
WE
CS
BA0
BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
AP
A11
A12
NC
A13
NC
Figure
Pin Configuration
Table 5
2.
Pin
Type
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
NC
I
NC
and
Table 6
Buffer
Type
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
—
SSTL
—
respectively. The pin numbering for FBGA is depicted in
Function
Clock Signal
Complementary Clock Signal
Clock Enable
Row Address Strobe
Column Address Strobe
Write Enable
Chip Select
Bank Address Bus 2:0
Address Bus 11:0
Address Signal 12
Note: 256 Mbit or larger dies
Note: 128 Mbit or smaller dies
Address Signal 13
Note: 1 Gbit based dies
Note: 512 Mbit or smaller dies
7
Table 4
(60 pins). The abbreviations used in the Pin#/Buffer#
HY[B/I]25D256[16/40/80]0C[E/C/F/T](L)
Pin Configuration of DDR SDRAM
256 Mbit Double-Data-Rate SDRAM
Figure 1
Internet Data Sheet
TABLE 4
and that of the