HYB18L256160B QIMONDA [Qimonda AG], HYB18L256160B Datasheet - Page 28
HYB18L256160B
Manufacturer Part Number
HYB18L256160B
Description
DRAMs for Mobile Applications 256-Mbit Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.HYB18L256160B.pdf
(58 pages)
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2.4.6
WRITE bursts are initiated with a WRITE command, as
shown in
Figure
The starting column and bank addresses are provided with
the WRITE command, and Auto Precharge is either enabled
or disabled for that access. If Auto Precharge is enabled, the
row being accessed is precharged at the completion of the
write burst. For the generic WRITE commands used in the
following illustrations, Auto Precharge is disabled.
During WRITE bursts, the first valid data-in element is registered coincident with the WRITE command, and subsequent data
elements are registered on each successive positive edge of CLK. Upon completion of a burst, assuming no other commands
have been initiated, the DQs remain in High-Z state, and any additional input data is ignored.
Figure 25
Rev. 1.73, 2006-09
01302004-CZ2R-J9SE
24; they apply to all write operations.
Figure
and
Figure 26
23. Basic timings for the DQs are shown in
WRITE
show a single WRITE burst for each supported CAS latency setting.
28
Basic WRITE Timing Parameters for DQs
HY[B/E]18L256160B[C/F]L-7.5
256-Mbit Mobile-RAM
WRITE Command
FIGURE 23
FIGURE 24
Data Sheet