W9864G6 WINBOND [Winbond], W9864G6 Datasheet - Page 5

• Manufacturer Part Number: W9864G6
• Description: 1M x 4 BANKS x 16 BITS SDRAM
• Manufacturer: WINBOND [Winbond]

5. PIN DESCRIPTION
BALL LOCATION PIN NAME
M1, M2, N1, N2,
G2, G6, H1, H7,
C1, C7, D1, D2,
N6, N7, P1, P2,
D6, D7, E1, E7,
A2, A6, B1, B7,
F1, F7, G1, G7
B6, C2, E6, F2
B2, C6, E2, F6
J1, K1, L2, L6
P6, P7, R6,
A7, H6, R7
A1, H2, R1
M6, M7
J6, J5
K6
K7
K2
L7
L1
J7
BS0, BS1
A0 − A11
UDQM
LDQM
DQ0 −
DQ15
V
V
RAS
CAS
CKE
CLK
V
V
WE
NC
CS
DDQ
SSQ
DD
SS
No Connection No connection
Power (+3.3V) Power for input buffers and logic circuit inside DRAM.
Power (+3.3V)
Ground for I/O
Row Address
Clock Enable
Write Enable
for I/O Buffer
Clock Inputs
Input/Output
Bank Select
Chip Select
FUNCTION
Data Input/
Address
Address
Column
Ground
Output
Strobe
Strobe
Buffer
Mask
Multiplexed pins for row and column address. Row
address: A0 − A11. Column address: A0 − A7.
A10 is sampled during a precharge command to
determine if all banks are to be precharged or bank
selected by BS0, BS1.
Select bank to activate during row address latch time,
or bank to read/write during address latch time.
Multiplexed pins for data output and input.
Disable or enable the command decoder. When
command decoder is disabled, new command is
ignored and previous operation continues.
Command input. When sampled at the rising edge of
the clock RAS , CAS and WE define the
operation to be executed.
Referred to RAS
Referred to RAS
The output buffer is placed at Hi-Z (with latency of 2)
when DQM is sampled high in read cycle. In write
cycle, sampling DQM high will block the write
operation with zero latency.
System clock used to sample inputs on the rising
edge of clock.
CKE controls the clock activation and deactivation.
When CKE is low, Power Down mode, Suspend
mode, or Self Refresh mode is entered.
Ground for input buffers and logic circuit inside
DRAM.
Separated power from V
immunity.
Separated ground from V
immunity.
- 5 -
Publication Release Date: January 27, 2003
DESCRIPTION
DD
SS
, to improve DQ noise
, to improve DQ noise
W9864G6DB
Revision A1