HYB18T512400BF-2.5 QIMONDA [Qimonda AG], HYB18T512400BF-2.5 Datasheet - Page 21

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HYB18T512400BF-2.5

Manufacturer Part Number
HYB18T512400BF-2.5
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) w = write only
2) When DRAM is operated at 85°C ≤
3) If PASR (Partial Array Self Refresh) is enabled, data located in areas of the array beyond the specified location will be lost if self refresh
Rev. 1.1, 2007-05
03292006-YBYM-WG0Z
Field
BA
SRF
A
DCC
Partial Self Refresh for 4 banks
PASR [2:0]
Partial Self Refresh for 8 banks
PASR [2:0]
refresh mode can be entered.
is entered. Data integrity will be maintained if
Bits
[15:14]
7
[6:4]
3
Type
w
w
w
w
w
w
1)
Description
Bank Adress
00
01
10
11
Address Bus, High Temperature Self Refresh Rate for
0
1
Address Bus
000
Address Bus, Duty Cycle Correction (DCC)
0
1
Address Bus, Partial Array Self Refresh for 4 Banks
Note: Only for 256 Mbit and 512 Mbit components
000
001
010
011
100
101
110
111
Address Bus, Partial Array Self Refresh for 8 Banks
Note: Only for 1G and 2G components
000
001
010
011
100
101
110
111
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
T
EMRS(2) Programming Extended Mode Register Definition (BA[2:0]=010
Case
BA MRS
BA EMRS(1)
BA EMRS(2)
BA EMRS(3): Reserved
A7 disable
A7 enable
A Address bits
A3 DCC disabled
A3 DCC enabled
PASR0 Full Array
PASR1 Half Array (BA[1:0]=00, 01)
PASR2 Quarter Array (BA[1:0]=00)
PASR3 Not defined
PASR4 3/4 array (BA[1:0]=01, 10, 11)
PASR5 Half array (BA[1:0]=10, 11)
PASR6 Quarter array (BA[1:0]=11)
PASR7 Not defined
PASR0 Full Array
PASR1 Half Array (BA[2:0]=000, 001, 010 & 011)
PASR2 Quarter Array (BA[2:0]=000, 001)
PASR3 1/8 array (BA[2:0] = 000)
PASR4 3/4 array (BA[2:0]= 010, 011, 100, 101, 110 & 111)
PASR5 Half array (BA[2:0]=100, 101, 110 & 111)
PASR6 Quarter array (BA[2:0]= 110 & 111)
PASR7 1/8 array(BA[2:0]=111)
≤ 95°C the extended self refresh rate must be enabled by setting bit A7 to "1" before the self
t
REF
conditions are met and no Self Refresh command is issued
2)
21
512-Mbit Double-Data-Rate-Two SDRAM
3)
3)
T
CASE
HYB18T512[40/80/16]0B[C/F]
> 85°C
Internet Data Sheet
TABLE 15
B
)

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