N08L1618C2AB NANOAMP [NanoAmp Solutions, Inc.], N08L1618C2AB Datasheet

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N08L1618C2AB

Manufacturer Part Number
N08L1618C2AB
Description
Manufacturer
NANOAMP [NanoAmp Solutions, Inc.]
Datasheet
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
8Mb Ultra-Low Power Asynchronous CMOS SRAM
512K × 16bit
Overview
The N08L1618C2A is an integrated memory
device containing a 8 Mbit Static Random Access
Memory organized as 524,288 words by 16 bits.
The device is designed and fabricated using
NanoAmp’s advanced CMOS technology to
provide both high-speed performance and ultra-low
power. The device operates with two chip enable
(CE1 and CE2) controls and output enable (OE) to
allow for easy memory expansion. Byte controls
(UB and LB) allow the upper and lower bytes to be
accessed independently and can also be used to
deselect the device. The N08L1618C2A is optimal
for various applications where low-power is critical
such as battery backup and hand-held devices.
The device can operate over a very wide
temperature range of -40
available in JEDEC standard packages compatible
with other standard 512Kb x 16 SRAMs
Product Family
Pin Configuration
N08L1618C2AB
N08L1618C2AB2
Part Number
C
D
G
H
A
B
E
F
I/O
I/O
I/O
I/O
V
V
A
LB
1
48 Pin BGA (top)
SS
CC
18
48 - BGA Green
14
15
8
9
Package Type
I/O
I/O
I/O
I/O
8 x 10 mm
OE
UB
NC
A
2
48 - BGA
8
10
11
12
13
A
A
A
NC
o
A
A
A
A
3
17
14
12
0
3
5
9
C to +85
A
A
A
A
A
A
A
A
4
NanoAmp Solutions, Inc.
670 North McCarthy Blvd. Suite 220, Milpitas, CA 95035
ph: 408-935-7777, FAX: 408-935-7770
www.nanoamp.com
16
15
13
10
1
4
6
7
CE1
I/O
I/O
I/O
I/O
WE
A
A
5
11
2
1
3
4
5
o
CE2
V
I/O
I/O
V
I/O
I/O
NC
C and is
6
CC
SS
(DOC# 14-02-019 REV F ECN# 01-1280)
-40
0
2
6
7
Temperature
Operating
o
C to +85
o
C 1.65V - 2.2V
Supply (Vcc)
Features
• Single Wide Power Supply Range
• Very low standby current
• Very low operating current
• Very low Page Mode operating current
• Simple memory control
• Low voltage data retention
• Very fast output enable access time
• Very fast Page Mode access time
• Automatic power down to standby mode
• TTL compatible three-state output driver
Pin Descriptions
Power
1.65 to 2.2 Volts
0.5µA at 1.8V (Typical)
1.0mA at 1.8V and 1µs (Typical)
0.5mA at 1.8V and 1µs (Typical)
Dual Chip Enables (CE1 and CE2)
Byte control for independent byte operation
Output Enable (OE) for memory expansion
Vcc = 1.2V
25ns OE access time
t
AAP
Pin Name
CE1, CE2
I/O
= 25ns
A
V
V
0
WE
0
OE
NC
UB
LB
-A
-I/O
CC
SS
85ns @ 1.65V
70ns @ 1.8V
18
15
Speed
Lower Byte Enable Input
Upper Byte Enable Input
Current (I
Output Enable Input
Data Inputs/Outputs
Write Enable Input
Advance Information
N08L1618C2A
Chip Enable Input
Standby
Address Inputs
Not Connected
Typical
0.5 µA
Pin Function
Ground
Power
SB
),
1 mA @ 1MHz
Current (Icc),
Operating
Typical

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N08L1618C2AB Summary of contents

Page 1

... The device can operate over a very wide o temperature range of - +85 available in JEDEC standard packages compatible with other standard 512Kb x 16 SRAMs Product Family Part Number Package Type N08L1618C2AB 48 - BGA N08L1618C2AB2 48 - BGA Green Pin Configuration ...

Page 2

NanoAmp Solutions, Inc. Functional Block Diagram Word Address Address Inputs Decode Logic Page Address Address Inputs Decode A4 - A18 Logic CE1 CE2 Control WE Logic Functional Description CE1 CE2 ...

Page 3

NanoAmp Solutions, Inc. Absolute Maximum Ratings Item Voltage on any pin relative to V Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time 1. Stresses greater than those listed above may ...

Page 4

NanoAmp Solutions, Inc. Power Savings with Page Mode Operation ( Page Address (A4 - A18) Word Address (A0 - A3) CE1 CE2 OE LB, UB Note: Page mode operation is a method of addressing the SRAM to save ...

Page 5

NanoAmp Solutions, Inc. Timing Test Conditions Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature Timing Item Read Cycle Time Address Access Time (Random Access) Address Access Time (Page Mode) ...

Page 6

NanoAmp Solutions, Inc. Timing of Read Cycle (CE1 = Address Previous Data Valid Data Out Timing Waveform of Read Cycle (WE=V Address CE1 CE2 OE LB LBLZ, High-Z Data Out The specifications of this device ...

Page 7

NanoAmp Solutions, Inc. Timing Waveform of Page Mode Read Cycle ( Page Address (A4 - A17) Word Address (A0 - A3) CE1 CE2 OE LB LBLZ, UBLZ High-Z Data Out The specifications of this device ...

Page 8

NanoAmp Solutions, Inc. Timing Waveform of Write Cycle (WE control) Address CE1 CE2 LB High-Z Data In Data Out Timing Waveform of Write Cycle (CE1 Control) Address CE1 (for CE2 Control, use inverted signal) LB Data ...

Page 9

NanoAmp Solutions, Inc. Ball Grid Array Package D A1 BALL PAD CORNER (3) TOP VIEW K TYP J TYP BOTTOM VIEW Dimensions (mm 8±0.10 10±0.10 0.375 The specifications of this device are subject to change without notice. ...

Page 10

NanoAmp Solutions, Inc. Ordering Information N08L1618C2AX-XX X Performance Package Type Revision History Revision Date A Jan. 2001 B Mar. 2001 C Dec. 2001 D Nov. 2002 E Oct. 2004 F Dec. 2005 © 2001 - 2002 Nanoamp Solutions, Inc. All ...

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