NT5DS16M16CS NANOAMP [NanoAmp Solutions, Inc.], NT5DS16M16CS Datasheet
NT5DS16M16CS
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NT5DS16M16CS Summary of contents
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... DQS is edge-aligned with data for reads and is center- aligned with data for writes Description NT5DS64M4CT, NT5DS32M8CT and NT5DS16M16CT, NT5DS64M4CS, NT5DS32M8CS and NT5DS16M16CS are 256Mb SDRAM devices based using a DDR interface. They are all based on Nanya’s 110 nm design process. The 256Mb DDR SDRAM uses a double-data-rate architec- ture to achieve high-speed operation ...
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... TSOP2 166 2.5-3-3 200 3-3-3 TSOP2 166 2.5-3-3 200 3-3-3 TSOP2 Green Packing 166 2.5-3-3 200 3-3-3 TSOP2 Green Packing 166 2.5-3-3 200 3-3-3 TSOP2 Green Packing 166 2.5-3-3 NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Comments DDR400 DDR333 DDR400 DDR333 DDR400 DDR333 DDR400 DDR333 DDR400 DDR333 DDR400 DDR333 2 ...
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... 66-pin Plastic TSOP-II 400mil 16Mb x 16 32Mb x 8 64Mb x 4 Column Address Table Organization Column Address 64Mb x 4 32Mb x 8 16Mb x 16 NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS DQ7 65 DQ15 SSQ SSQ NC 63 DQ14 DQ6 ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Clock: CK and CK are differential clock inputs. All address and control input signals are sampled on the crossing of the positive edge of CK and negative edge of CK. Output (read) data is refer- enced to the crossings of CK and CK (both directions of crossing) ...
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... Bank2 Bank1 8192 Bank0 Memory Array (8192 x 1024 Sense Amplifiers I/O Gating Mask Logic 8 1024 (x8) Column Decoder 10 COL0 1 NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CK, CK DLL Data DQS Generator DQ0-DQ3, DM COL0 DQS Input Register DQS Mask 1 1 Write 1 ...
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... Note unidirectional signal (input only), but is internally loaded to match the load of the bidi- rectional DQ and DQS signals. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Bank3 Bank2 Bank1 8192 ...
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... Note unidirectional signal (input only), but is internally loaded to match the load of the bidi- rectional DQ and DQS signals. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Bank3 Bank2 Bank1 8192 ...
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... DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com < 0.3V DDQ DD < 0.3V TT DDQ such that V < 0.3V REF DDQ NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 8 ...
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... Read and Write bursts. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS -Ai when the burst length is set to four and -Ai when ...
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... DLL Reset Vendor-Specific Test Mode Reserved A4 Latency A2 0 Reserved 1 Reserved (Option) 0 Reserved 1 1.5 (Option) 0 2.5 1 Reserved NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Address Bus Mode Register BT Burst Length Burst A3 Type 0 Sequential 1 Interleave Burst Length A1 A0 Burst Length ...
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... Reserved states should not be used as unknown operation or incompatibility with future versions may result. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Order of Accesses Within a Burst A0 Type = Sequential ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NOP NOP CL=2 NOP NOP CL=2.5 , and t . DQSQ NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CAS Latency = NOP NOP CAS Latency = 2. NOP NOP Don’t Care NOP NOP 12 ...
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... DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS for DDR SDRAM’s (Exit Self Refresh to Read Com- XSRD , Exit Self Refresh to Non-Read Command). ...
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... Operating Mode Operating Mode A 1 Normal Operation 0 All other states Reserved 1 A QFC 2 0 Disable Enable 1 (Optional) NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Address Bus Extended QFC DS DLL Mode Register Drive Strength Drive Strength Normal Reserved ...
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... Truth Table 1b: DM Operation 1. Used to mask write data; provided coincident with the corresponding data. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CS RAS CAS H ...
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... NOP if there is no open row in that bank the previously open row is already in the process of precharging. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS is met. MRD ) after the Precharge command is issued. Input A10 ...
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... DQ0 t RCDmin t RAPmin for devices that support t RAP (min) and dataout is available with the shortest latency from the RCD NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS (min). The user RAS ) is completed. (min) specification. The t RAS (min) has been satisfied. RAS CL= NOP ...
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... A simple algorithm for meeting both refresh and DLL requirements is to apply NOPs for 200 clock cycles before applying any other command. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS because time is required for the completion of XSNR 18 ...
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... The minimum time interval between successive Active commands to different banks is defined by t Activating a Specific Row in a Specific Bank DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CK CK HIGH CKE ...
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... Accesses: CAS Latencies (Burst Length = within a page (or pages) can be performed as shown on page 25. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NOP ACT NOP ...
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... NanoAmp Solutions, Inc. Read Command x4: A0-A9, A11 DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CK CK HIGH CKE CS RAS CAS WE CA x8: A0- A10 DIS AP ...
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... QFC is an open drain driver. The output high level is achieved through an external pull up resistor connected to V DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NOP NOP NOP ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NOP Read BAa, COL b CL=2 DOa-n NOP Read BAa,COL b CL=2.5 DOa and t . DQSQ NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CAS Latency = 2 NOP NOP NOP DOa-b CAS Latency = 2.5 NOP NOP NOP DOa- b Don’t Care 23 ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NOP NOP CL=2 DO a-n NOP NOP Read BAa, COL b CL=2.5 DO a-n . DQSQ NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CAS Latency = 2 Read NOP NOP BAa, COL b DOa- b CAS Latency = 2.5 NOP NOP DOa- b Don’t Care NOP 24 ...
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... Shown with nominal and t AC DQSCK DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Read Read Read BAa, COL x BAa, COL b BAa, COL g CL=2 ...
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... The advantage of the Precharge command is that it can be used to truncate bursts. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS (min). The t (max) case, not shown here, has a longer bus idle DQSS DQSS is met ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NOP BST CL=2 DOa-n NOP BST CL=2.5 DOa-n , and t . DQSQ NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CAS Latency = 2 NOP NOP NOP No further output data after this point. DQS tristated. CAS Latency = 2.5 NOP NOP NOP No further output data after this point. DQS tristated. ...
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... Data In elements are applied following Dl a-b in the programmed order, according to burst length. Shown with nominal and t AC DQSCK DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS BST NOP BAa, COL b CL=2 DOa-n BST NOP CL=2.5 DOa-n ...
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... DO a-n. Shown with nominal DQSCK DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NOP PRE NOP all CL=2 DOa-n NOP ...
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... DO a-n. Shown with nominal DQSCK DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Read with NOP Auto Precharge t RP CL=2 DOa-n ...
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... DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS (max)). Timing figure Write Burst (Burst Length = 4) on page 33 shows the two DQSS (Write to Read) should be met as shown in timing figure Write to Read: Non-Interrupting is met ...
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... NanoAmp Solutions, Inc. Write Command x4: A0-A9, A11 DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CK CK HIGH CKE CS RAS CAS WE x8: A0- A10 DIS AP ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T1 T2 Write NOP t (max) DQSS Dla-b t (max) QCSW T1 T2 Write NOP t (min) DQSS Dla-b t (max) QCSW NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS T3 T4 NOP NOP t (min) QCHW Minimum D QSS T3 T4 NOP NOP t (max) QCHW . DDQ Don’t Care 33 ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T2 T3 NOP Write BAa, COL n t (max) DQSS DI a NOP Write BA, COL n t (min) DQSS DI a-b NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS T4 T5 NOP NOP NOP DI a-n Minimum D QSS T4 T5 NOP NOP NOP DI a-n Don’t Care T6 T6 ...
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... DI a-n. A non-interrupted burst is shown. Each Write command may be to any bank. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS T2 T3 NOP NOP t ...
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... LSB inverted). Each Write command may be to any bank. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS T2 T3 Write Write ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T2 T3 NOP NOP t (max) DQSS DI a NOP NOP t (min) DQSS DI a-b NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS NOP Read NOP t WTR BAa, COL Minimum D QSS ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T2 T3 NOP NOP t (max) DQSS DIa NOP NOP t (min) DQSS DI a-b NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS T4 T5 NOP Read NOP t WTR BAa, COL Minimum D QSS T4 T5 ...
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... This bit is correctly written into the memory array low These bits are incorrectly written into the memory array low. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS T2 T3 NOP NOP ...
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... The Read and Write commands are not necessarily to the same bank These bits are incorrectly written into the memory array low. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NOP ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T2 T3 NOP NOP t (max) DQSS DI a NOP NOP t (min) DQSS DI a-b NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS NOP NOP PRE all) Minimum D QSS NOP ...
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... The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com T2 T3 NOP NOP t (max) DQSS DI a NOP NOP t (min) DQSS DI a NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Maximum D QSS NOP PRE NOP all Minimum D QSS T4 ...
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... This bit is correctly written into the memory array low These bits are incorrectly written into the memory array low. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS T2 T3 NOP NOP ...
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... For programmed burst length of 4, DQS becomes don't care at this point These bits are incorrectly written into the memory array low. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NOP ...
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... Care.” Once a bank has been precharged the idle state and must be activated prior to any Read or Write commands being issued to that bank. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS CK CK HIGH CKE ...
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... No column access in progress DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS t IS NOP Enter Power Down mode (Burst Read or Write operation must not be in progress) ...
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... Auto Refresh L Deselect or NOP See “Truth Table 3: Current State H Bank n - Command to Bank n (Same Bank)” on page 48 NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Action n Maintain Self-Refresh Exit Self-Refresh Maintain Power Down Exit Power Down Precharge Power Down Entry Self Refresh Entry Active Power Down Entry ) period ...
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... Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes with Auto Precharge disabled. 11. Requires appropriate DM masking. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS WE Command X Deselect NOP. Continue previous operation ...
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... Read data and Write data must be avoided). DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS WE Command X ...
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... Read data and Write data must be avoided). DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS WE Command H ...
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... PRE Precharge PRE Preall CKEL = Enter Power Down CKEH = Exit Power Down ACT = Active Write A = Write with Autoprecharge Read A = Read with Autoprecharge PRE = Precharge NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Self Refresh Auto REFA Refresh CKEL Precharge Power Down Burst Stop ...
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... DQS, DQ, and DM input slew rate is specified to prevent double clocking of data and preserve setup and hold times. Signal transition through the DC region must be monotonic. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Parameter ...
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... REF TT stabilizes. REF of the transmitting device, and to track variations in the DC level of the same. Peak-to-peak DDQ is a system supply for signal termination resistors, is expected to be set equal REF NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Min. Max. Units CI 2 ...
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... DC level of the same. Peak-to-peak DDQ is a system supply for signal termination resistors, is expected to be set equal REF V (V) OUT NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Min Max Units 9.0 mA 9.0 Maximum Typical High Typical Low Minimum 2 ...
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... These characteristics are intended to obey the SSTL_2 class II standard. 8. This specification is intended for DDR SDRAM only. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS V (V) OUT Minimum ...
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... Normal Strength Driver Evaluation Conditions Temperature (T ) ambient V DDQ Process conditions DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Typical Min Max Low 4.6 9.6 -6.1 9.2 18.2 -12.2 13 ...
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... AC Output Load Circuit Diagrams DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS to V swing 1.5V in the test environment, but input timing is still referenced IL ...
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... DDQ = V = 2.6V 0.1V (DDR400); See AC Characteristics) DDQ (min); DQ, DM (min); all banks idle; CKE V (min (min 0mA OUT (min) RFC 0.2V NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Min Max Unit V + 0.31 REF V 0.31 REF 0. 0.6 DDQ 0.5*V 0.2 0.5*V 0.2 DDQ DDQ DDR400 DDR333 (5T) (6K) Unit Notes t =5ns ...
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... Address and control input setup time t IS (slow slew rate) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS = V = 2.6V 0.1V (DDR400); See AC Characteristics) DDQ DD DDR400 ...
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... Exit self-refresh to read command XSRD t Average Periodic Refresh Interval REFI DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS = V = 2.6V 0.1V (DDR400); See AC Characteristics) DDQ DD DDR400 (5T) ...
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... For example, for DDR266 2.5, t (20ns/7.5ns DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS . REF stabilizes. REF 1.0V/ns. Slew rate is measured between V 0.5V/ns and < ...
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... These derating parameters may be guaranteed by design or tester characterization and are not necessarily tested on each device. DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS and t IS delta (t ...
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... HP HP1 t t DQSQ t QH1 t DQSQ the diagram above ( NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Don’t Care HP2 HP3 HP4 t QH2 QH4 t DQSQ t QH3 t DQSQ is referenced to the clock duty cycle only is a function of the clock high or low time ( etc ...
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... NanoAmp Solutions, Inc. Initialize and Mode Register Sets DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 64 ...
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... NanoAmp Solutions, Inc. Power Down Mode DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 65 ...
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... NanoAmp Solutions, Inc. Auto Refresh Mode DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 66 ...
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... NanoAmp Solutions, Inc. Self Refresh Mode DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 67 ...
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... NanoAmp Solutions, Inc. Read without Auto Precharge (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 68 ...
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... NanoAmp Solutions, Inc. Read with Auto Precharge (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 69 ...
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... NanoAmp Solutions, Inc. Bank Read Access (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 70 ...
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... NanoAmp Solutions, Inc. Write without Auto Precharge (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 71 ...
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... NanoAmp Solutions, Inc. Write with Auto Precharge (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 72 ...
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... NanoAmp Solutions, Inc. Bank Write Access (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 73 ...
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... NanoAmp Solutions, Inc. Write DM Operation (Burst Length = 4) DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 74 ...
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... NanoAmp Solutions, Inc. Package Dimensions (400mil; 66 lead; Thin Small Outline Package) Lead #1 0.65 Basic DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS 22.22 0.10 + 0.03 0.30 - 0.08 0.05 Min Detail A Seating Plane 0 ...
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... DOC # 14-02-044 Rev A ECN # 01-1116 The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS Date Change Description Initial datasheet ...