NT5DS16M16CS NANOAMP [NanoAmp Solutions, Inc.], NT5DS16M16CS Datasheet - Page 44
NT5DS16M16CS
Manufacturer Part Number
NT5DS16M16CS
Description
256Mb DDR Synchronous DRAM
Manufacturer
NANOAMP [NanoAmp Solutions, Inc.]
Datasheet
1.NT5DS16M16CS.pdf
(76 pages)
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NanoAmp Solutions, Inc.
DOC # 14-02-044 Rev A ECN # 01-1116
The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com
Write to Precharge: Nominal DQSS (2 bit Write), Interrupting (Burst Length = 4 or 8)
Command
Address
DQS
DQ
DM
DI a-b = Data In for bank a, column b.
An interrupted burst is shown, 2 data elements are written.
1 subsequent element of data in is applied in the programmed order following DI a-b.
t
The Precharge command masks the last 2 data elements in the burst.
A10 is Low with the Write command (Auto Precharge is disabled).
1 = Can be don't care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don't care at this point.
3 = These bits are incorrectly written into the memory array if DM is low.
CK
CK
WR
is referenced from the first positive CK edge after the last desired data in pair.
BA a, COL b
Write
T1
DI a-b
NOP
T2
t
DQSS
(nom)
NOP
3
T3
3
NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT
NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS
NOP
t
1
WR
T4
2
1
BA (a or all)
PRE
T5
NOP
t
RP
Don’t Care
T6
44