NT5DS16M16CS NANOAMP [NanoAmp Solutions, Inc.], NT5DS16M16CS Datasheet - Page 42

• Manufacturer Part Number: NT5DS16M16CS
• Description: 256Mb DDR Synchronous DRAM
• Manufacturer: NANOAMP [NanoAmp Solutions, Inc.]

NanoAmp Solutions, Inc.
DOC # 14-02-044 Rev A ECN # 01-1116
The specifications of this device are subject to change without notice. For latest documentation, see http://www.nanoamp.com
Write to Precharge: Interrupting (Burst Length = 4 or 8)
Command
Command
Address
Address
DQS
DQS
DM
DQ
DM
DI a-b = data in for bank a, column b.
An interrupted burst is shown, 2 data elements are written.
1 subsequent element of data in is applied in the programmed order following DI a-b.
t
The Precharge command masks the last 2 data elements in the burst, for burst length = 8.
A10 is Low with the Write command (Auto Precharge is disabled).
DQ
3 = These bits are incorrectly written into the memory array if DM is low.
CK
CK
CK
CK
1 = Can be don't care for programmed burst length of 4.
2 = For programmed burst length of 4, DQS becomes don't care at this point.
WR
is referenced from the first positive CK edge after the last desired data in pair.
BA a, COL b
BA a, COL b
Write
Write
T1
T1
t
DQSS
DI a-b
(max)
t
DQSS
NOP
NOP
T2
T2
DI a-b
(min)
3
NOP
NOP
T3
T3
3
3
3
1
NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT
NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS
NOP
NOP
t
t
WR
WR
2
T4
T4
1
1
2
1
BA (a or all)
BA (a or all)
PRE
PRE
T5
T5
Maximum D
Minimum D
NOP
NOP
t
t
RP
QSS
RP
QSS
Don’t Care
T6
T6
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