PSD4235G2V-10U STMICROELECTRONICS [STMicroelectronics], PSD4235G2V-10U Datasheet - Page 27

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PSD4235G2V-10U

Manufacturer Part Number
PSD4235G2V-10U
Description
Flash In-System Programmable (ISP) Peripherals for 16-bit MCUs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Table 29. 16-bit Instructions
Note: 1. All bus cycles are WRITE bus cycles, except the ones with the “Read” label
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
READ
READ Main Flash
ID
READ Sector
Protection
Program a Flash
Word
Flash Sector
Erase
Flash Bulk Erase
Suspend Sector
Erase
Resume Sector
Erase
RESET
Unlock Bypass
Unlock Bypass
Program
Unlock Bypass
Reset
(6, 13)
10. The Unlock Bypass Reset Flash instruction is required to return to reading memory data when the device is in the Unlock Bypass
11. The system may perform READ and Program cycles in non-erasing sectors, read the Flash ID or read the Sector Protection Status
12. The Resume Sector Erase instruction is valid only during the Suspend Sector Erase mode.
13. The MCU cannot invoke these instructions while executing code from the same Flash memory as that for which the instruction is
14. All WRITE bus cycles in an instruction are byte-WRITE to an even address (XA4Ah or X554h). A Flash memory Program bus cycle
Instruction
2. All values are in hexadecimal:
3. Sector Select (FS0 to FS15 or CSBOOT0 to CSBOOT3) signals are active High, and are defined in PSDsoft.
4. Only address bits A11-A0 are used in instruction decoding.
5. No Unlock or instruction cycles are required when the device is in the READ Mode
6. The RESET instruction is required to return to the READ Mode after reading the Flash ID, or after reading the Sector Protection
7. Additional sectors to be erased must be written at the end of the Sector Erase instruction within 80µs.
8. The data is 00h for an unprotected sector, and 01h for a protected sector. In the fourth cycle, the Sector Select is active, and
9. The Unlock Bypass instruction is required prior to the Unlock Bypass Program instruction.
(13)
(7,13)
(11)
(12)
(10)
(5)
X = “Don’t care.” Addresses of the form XXXXh, in this table, must be even addresses
RA = Address of the memory location to be read
RD = Data read from location RA during the READ cycle
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of WRITE Strobe (WR, CNTL0).
PA is an even address for PSD in word programming mode.
PD = Data word to be programmed at location PA. Data is latched on the rising edge of WRITE Strobe (WR, CNTL0)
SA = Address of the sector to be erased or verified. The Sector Select (FS0-FS15 or CSBOOT0-CSBOOT3) of the sector to be
erased, or verified, must be Active (High).
Status, or if the Error Flag Bit (DQ5/DQ13) goes High.
(A1,A0) = (1,0).
mode.
when in the Suspend Sector Erase mode. The Suspend Sector Erase instruction is valid only during a Sector Erase cycle.
intended. The MCU must retrieve, for example, the code from the secondary Flash memory when reading the Sector Protection
Status of the primary Flash memory.
writes a word to an even address.
(6)
(9)
(6,8,13)
(14)
(13)
FS0-FS15 or
CSBOOT0-
CSBOOT3
1
0
1
1
1
1
1
1
1
1
1
1
“Read”
RD @ RA
AAh@
XAAAh
AAh@
XAAAh
AAh@
XAAAh
AAh@
XAAAh
AAh@
XAAAh
B0h@
XXXXh
30h@
XXXXh
F0h@
XXXXh
AAh@
XAAAh
A0h@
XXXXh
90h@
XXXXh
Cycle 1
55h@
X554h
55h@
X554h
55h@
X554h
55h@
X554h
55h@
X554h
55h@
X554h
PD@ PA
00h@
XXXXh
Cycle 2
90h@
XAAAh
90h@
XAAAh
A0h@
XAAAh
80h@
XAAAh
80h@
XAAAh
20h@
XAAAh
Cycle 3
Read ID
@ XX02h
Read 00h
or 01h @
XX04h
PD@ PA
AAh@
XAAAh
AAh@
XAAAh
Cycle 4
55h@
X554h
55h@
X554h
Cycle 5
30h@
SA
10h@
XAAAh
Cycle 6
PSD4256G6V
30h
next SA
Cycle 7
27/100
(7)
@

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