STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 25

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STC4130-I

Manufacturer Part Number
STC4130-I
Description
Synchronous Clock for SETS
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
WRB
RDB
RDY
ALE
AD
CS
t
t
Symbol
ALE
ADs
Symbol
t
t
t
t
t
t
RDYd1
RDYd2
RDYd3
t
WRBh
RDYd3
t
t
t
t
t
t
t
ALEd
WRB
RDY
ALE
ADs
ADh
CSs
CSh
CSd
t
t
Dh
Ds
Address
© Copyright 2006 The Connor-Winfield Corp.
t
ADh
RDY high-z delay after CS high
ALE high time
ALE falling edge to RDB low
Address setup time
Address hold time
Write CS setup time
Write time
CS hold time
CS delay for multiple write/reads
Data setup time
Data hold time
CS low to RDY active
WRB low to RDY low
RDY low time
WRB hold after RDY high
RDY high-z delay after CS high
t
ALEd
t
RDYd1
t
CSs
Figure 16: Multiplex Bus Write Timing
Table 11: Multiplex Bus Write Timing
Data Sheet #: TM084
t
RDYd2
Description
Description
t
RDY
t
t
CSd
WRB
t
Ds
Data
All Rights Reserved
t
WRBh
Page 25 of 44
Synchronous Clock for SETS
t
Dh
t
CSh
Min
Min
50
10
10
10
40
10
10
10
50
0
0
0
Specifications subject to change without notice
t
RDYd3
Max
Max
13
40
10
9
Rev: P02
Unit
Unit
STC4130
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Data Sheet
Date: 12/5/06

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