STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 27

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

T0_T4_MS_Sts, 0x04 (R/W)
Reflects the states of the T0/T4_Master_Slave select pins. 1 = Master, 0 = slave
T0_Slave_Phase_Adj, 0x05 (R/W)
The T0 slave phase may be adjusted 0 to 409.5 nS relative to the cross couple input with 0.1 nS resolution.
This is a 12 bit register, split across address 0x05 and 0x06.
Default value: 0.
T4_Slave_Phase_Adj, 0x07 (R/W)
The T4 slave phase may be adjusted 0 to 409.5 nS relative to the cross couple input with 0.1 nS resolution.
This is a 12 bit register, split across address 0x07 and 0x08.
Default value: 0.
Fill_Rate, 0x09 (R/W)
Sets the fill rate window size for the reference activity monitor. The value can be set from 0 to 15, correspond-
ing to 1mS to 16mS.
Default value: 1.
Leak_Rate, 0x0a (R/W)
Sets the leak rate for the reference activity monitor to 1/nth of the fill rate, corresponding to n x the fill rate win-
dow size. Valid values from 0 to 15, corresponding to n = 1 to 16. For example, if the fill rate is set to 4mS and
the leak rate is set to 3 (n = 4), the leak rate window size will be 16mS.
Default value: 3.
Address
Address
Address
Address
Address
0x04
0x05
0x06
0x07
0x08
0x09
0x0a
Bit7
Bit7
Bit7
Bit7
Bit7
Not used
© Copyright 2006 The Connor-Winfield Corp.
Bit6
Bit6
Bit6
Bit6
Bit6
Not used
Not used
Not used
Adjust T0 slave phase from 0 ~ 409.5 nS in 0.1 nS steps, lower 8 bits
Adjust T4 slave phase from 0 ~ 409.5 nS in 0.1 nS steps, lower 8 bits
Data Sheet #: TM084
Bit5
Bit5
Bit5
Bit5
Bit5
Not used
Bit4
Bit4
Bit4
Bit4
Bit4
All Rights Reserved
Leaky bucket fill rate window, 0 ~ 15, Default = 0
Adjust T0 slave phase from 0 ~ 409.5 nS in 0.1 nS steps,
Adjust T4 slave phase from 0 ~ 409.5 nS in 0.1 nS steps,
Page 27 of 44
Bit3
Bit3
Bit3
Bit3
Bit3
Synchronous Clock for SETS
Leak rate, 1/n
Specifications subject to change without notice
Bit2
Bit2
Bit2
Bit2
Bit2
upper 4 bits
upper 4 bits
Rev: P02
th
of fill rate, 0 ~ 15
STC4130
T4 M/S
Data Sheet
Bit1
Bit1
Bit1
Bit1
Bit1
Date: 12/5/06
T0 M/S
Bit0
Bit0
Bit0
Bit0
Bit0