STM8L151K6U3 STMICROELECTRONICS [STMicroelectronics], STM8L151K6U3 Datasheet - Page 15

• Manufacturer Part Number: STM8L151K6U3
• Description: 8-bit ultralow power MCU, up to 32 KB Flash, 1 KB Data EEPROM RTC, LCD, timers, USART, I2C, SPI, ADC, DAC, comparators
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

STM8L151xx, STM8L152xx
3.3
3.3.1
3.3.2
3.3.3
Reset and supply management
Power supply scheme
The device requires a 1.65 V to 3.6 V operating supply voltage (V
supply pins must be connected as follows:
●
●
●
●
●
Power supply supervisor
The device has an integrated ZEROPOWER power-on reset (POR)/power-down reset
(PDR), coupled with a brownout reset (BOR) circuitry. At power-on, BOR is always active,
and ensures proper operation starting from 1.8 V. After the 1.8 V BOR threshold is reached,
the option byte loading process starts, either to confirm or modify default thresholds, or to
disable BOR permanently (in which case, the V
Five BOR thresholds are available through option bytes, starting from 1.8 V to 3 V. To
reduce the power consumption in Halt mode, it is possible to automatically switch off the
internal reference voltage (and consequently the BOR) in Halt mode. The device remains in
reset state when V
any external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V
levels between 1.85 V and 3.05 V, chosen by software, with a step around 200 mV. An
interrupt can be generated when V
V
a warning message and/or put the MCU into a safe state. The PVD is enabled by software.
Voltage regulator
The STM8L15xxx embeds an internal voltage regulator for generating the 1.8 V power
supply for the core and peripherals.
This regulator has two different modes:
●
●
DD
DD
/V
/V
V
and for the internal regulator. Provided externally through V
ground pin is V
V
analog peripherals (minimum voltage to be applied to V
used). V
V
I/Os. V
V
externally through V
V
through V
Main voltage regulator mode (MVR) for Run, Wait for interrupt (WFI) and Wait for event
(WFE) modes.
Low power voltage regulator mode (LPVR) for Halt, Active-halt, Low power run and Low
power wait modes.
SS
SSA ;
SSIO
REF+
REF+
DDA
DDA
; V
power supply and compares it to the V
is higher than the V
; V
V
; V
DDIO
(for DAC): external voltage reference for DAC must be provided externally
DD
DDA
DDA
DDIO
REF-
REF+
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supply for I/Os
and V
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supplies for
and V
DD
= 1.8 to 3.6 V, down to 1.65 V at power down: external power supplies for
(for ADC1): external reference voltage for ADC1. Must be provided
.
SS
is below a specified threshold, V
.
SSIO
SSA
REF+
must be connected to V
must be connected to V
PVD
and V
Doc ID 15962 Rev 2
threshold. The interrupt service routine can then generate
DD
REF-
/V
DDA
pin.
drops below the V
DD
PVD
min value at power down is 1.65 V).
DD
DD
POR/PDR
threshold. This PVD offers 7 different
and V
and V
DDA
SS
SS
PVD
or V
, respectively.
, respectively.
DD
is 1.8 V when the ADC1 is
DD
BOR
threshold and/or when
pins, the corresponding
). The external power
Functional overview
, without the need for
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