ATMEGA644PV ATMEL [ATMEL Corporation], ATMEGA644PV Datasheet - Page 185

no-image

ATMEGA644PV

Manufacturer Part Number
ATMEGA644PV
Description
8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644PV-10AQ
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA644PV-10AQR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA644PV-10AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA644PV-10AUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA644PV-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATMEGA644PV-20AU
Manufacturer:
Atmel
Quantity:
10 000
17.10 Multi-processor Communication Mode
8011D–AVR–02/07
Table 17-2.
Table 17-3.
The recommendations of the maximum receiver baud rate error was made under the assump-
tion that the Receiver and Transmitter equally divides the maximum total error.
There are two possible sources for the receivers baud rate error. The Receiver’s system clock
(XTAL) will always have some minor instability over the supply voltage range and the tempera-
ture range. When using a crystal to generate the system clock, this is rarely a problem, but for a
resonator the system clock may differ more than 2% depending of the resonators tolerance. The
second source for the error is more controllable. The baud rate generator can not always do an
exact division of the system frequency to get the baud rate wanted. In this case an UBRR value
that gives an acceptable low error can be used if possible.
Setting the Multi-processor Communication mode (MPCMn) bit in UCSRnA enables a filtering
function of incoming frames received by the USART Receiver. Frames that do not contain
address information will be ignored and not put into the receive buffer. This effectively reduces
the number of incoming frames that has to be handled by the CPU, in a system with multiple
MCUs that communicate via the same serial bus. The Transmitter is unaffected by the MPCMn
setting, but has to be used differently when it is a part of a system utilizing the Multi-processor
Communication mode.
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indi-
cates if the frame contains data or address information. If the Receiver is set up for frames with
nine data bits, then the ninth bit (RXB8n) is used for identifying address and data frames. When
# (Data+Parity Bit)
# (Data+Parity Bit)
10
10
D
D
5
6
7
8
9
5
6
7
8
9
Recommended Maximum Receiver Baud Rate Error for Normal Speed Mode
(U2Xn = 0)
Recommended Maximum Receiver Baud Rate Error for Double Speed Mode
(U2Xn = 1)
R
R
slow
slow
93.20
94.12
94.81
95.36
95.81
96.17
94.12
94.92
95.52
96.00
96.39
96.70
(%)
(%)
R
R
105.66
104.92
104,35
103.90
103.53
103.23
105.79
105.11
104.58
104.14
103.78
106.67
fast
fast
(%)
(%)
Max Total Error (%)
ATmega164P/324P/644P
Max Total Error (%)
+5.66/-5.88
+4.92/-5.08
+4.35/-4.48
+3.90/-4.00
+3.53/-3.61
+3.23/-3.30
+5.79/-5.88
+5.11/-5.19
+4.58/-4.54
+4.14/-4.19
+3.78/-3.83
+6.67/-6.8
Recommended Max
Recommended Max
Receiver Error (%)
Receiver Error (%)
± 2.5
± 2.0
± 1.5
± 1.5
± 1.5
± 1.0
± 2.5
± 2.0
± 2.0
± 1.5
± 3.0
± 1.5
185

Related parts for ATMEGA644PV