ATMEGA644PV ATMEL [ATMEL Corporation], ATMEGA644PV Datasheet - Page 332

• Manufacturer Part Number: ATMEGA644PV
• Description: 8-bit Microcontroller with 16/32/64K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Table 26-9.
Notes:
332
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega164P/324P/644P, this parameter is characterized and not 100% tested.
2. Required only for fSCL > 100 kHz.
3. Cb = capacitance of one bus line in pF.
4. fCK = CPU clock frequency
5. This requirement applies to all ATmega32 Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega32 Two-wire Serial Interface is (1/fSCL - 2/fCK), thus fCK must be greater
7. The actual low period generated by the ATmega32 Two-wire Serial Interface is (1/fSCL - 2/fCK), thus the low time require-
ATmega164P/324P/644P
Serial Bus need only obey the general fSCL requirement.
than 6 MHz for the low time requirement to be strictly met at fSCL = 100 kHz.
ment will not be strictly met for fSCL > 308 kHz when fCK = 8 MHz. Still, ATmega32 devices connected to the bus may
communicate at full speed (400 kHz) with other ATmega32 devices, as well as any other device with a proper tLOW accep-
tance margin.
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
2-wire Serial Bus Requirements (Continued)
Figure 26-6. 2-wire Serial Bus Timing
SCL
SDA
t
SU;STA
t
HD;STA
t
t
of
LOW
f
f
f
f
f
f
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
t
HD;DAT
t
LOW
t
SU;DAT
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
t
SU;STO
t
r
3.45
Max
0.9
–
–
–
–
–
–
–
–
–
–
8011D–AVR–02/07
t
BUF
Units
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs