P89LPC9151 NXP [NXP Semiconductors], P89LPC9151 Datasheet - Page 15

• Manufacturer Part Number: P89LPC9151
• Description: 8-bit microcontroller with accelerated two-clock 80C51 core, 2 kB 3 V byte-erasable flash with 8-bit ADC
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 5.
[1]
P89LPC9151_61_71_2
Product data sheet
Symbol
P1.0 to P1.5
P1.0/TXD
P1.1/RXD
P1.2/T0/SCL
P1.3/INT0/SDA
P1.4/INT1
P1.5/RST
P2.2
V
V
SS
DD
Input/output for P1.0 to P1.4. Input for P1.5.
P89LPC9171 Pin description
Pin
TSSOP16
10
9
8
7
6
3
5
4
12
Type Description
I/O, I
[1]
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I
I/O
I/O
I
I
I
I/O
I
I
Port 1: Port 1 is an 6-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input
only mode with the internal pull-up disabled. The operation of the configurable
Port 1 pins as inputs and outputs depends upon the port configuration selected.
Each of the configurable port pins are programmed independently. Refer to
Section 7.15.1 “Port configurations”
details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TXD — Transmitter output for serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain when
used as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4. High current source.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during power-on or if selected via UCFG1. When
functioning as a reset input, a LOW on this pin resets the microcontroller, causing
I/O ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force ISP
mode.
Port 2: P2.2 is a single-bit I/O port with a user-configurable output type. During
reset P2.2 latch is configured in the input only mode with the internal pull-up
disabled. The operation of the output depends upon the port configuration
selected. Refer to
This pin has Schmitt trigger inputs.
Ground: 0 V reference.
Power supply: This is the power supply voltage for normal operation as well as
Idle and Power-down modes.
Rev. 02 — 9 February 2010
2
2
C-bus serial clock input/output.
C-bus serial data input/output.
Section 7.15 “I/O ports”
P89LPC9151/9161/9171
and
8-bit microcontroller with 8-bit ADC
Table 16 “Static characteristics”
for details.
© NXP B.V. 2010. All rights reserved.
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