P89LV51RD2BA PHILIPS [NXP Semiconductors], P89LV51RD2BA Datasheet - Page 15

• Manufacturer Part Number: P89LV51RD2BA
• Description: 8-bit 80C51 3 V low power 64 kB Flash microcontroller with 1 kB RAM
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 14342
Product data
7.1.3 Software reset
Figure
ensure the V
time does not exceed 10 milliseconds.
For a low frequency oscillator with slow start-up time the reset signal must be
extended in order to account for the slow start-up time. This method maintains the
necessary relationship between V
indeterminate location, which may cause corruption in the code of the flash. The
power-on detection is designed to work during initial power up, before the voltage
reaches the brown-out detection level. The POF flag in the PCON register is set to
indicate an initial power up condition. The POF flag will remain active until cleared by
software.
Following a power-on or external reset the P89LV51RB2/RC2/RD2 will force the SWR
and BSEL bits (FCF[1:0]) = 00. This causes the bootblock to be mapped into the
lower 8 kB of code memory and the device will execute the ISP code in the boot block
and attempt to autobaud to the host. If the autobaud is successful the device will
remain in ISP mode. If, after approximately 400 ms, the autobaud is unsuccessful the
boot block code will check to see if the SoftICE flag is set (from a previous
programming operation). If the SoftICE flag is set the device will enter SoftICE mode.
If the SoftICE flag is cleared, the bootcode will execute a software reset causing the
device to execute the user code from block 0 starting at address 0000h. Note that an
external reset applied to the RST pin has the same effect as a power-on reset.
A software reset is executed by changing the SWR bit (FCF.1) from ‘0’ to ‘1’. A
software reset will reset the program counter to address 0000H and force both the
SWR and BSEL bits (FCF[1:0]) =10. This will result in the lower 8 kB of the user code
memory being mapped into the user code memory space. Thus the user's code will
be executed starting at address 0000h. A software reset will not change WDTC.2 or
RAM data. Other SFRs will be set to their reset values.
Fig 5. Power-on reset circuit.
5. Note that if an RC circuit is being used, provisions should be made to
DD
rise time does not exceed 1 millisecond and the oscillator start-up
Rev. 04 — 02 December 2004
V DD
8.2 k
10
m
W
F
C 2
C 1
DD
P89LV51RB2/RC2/RD2
and RST to avoid programming at an
XTAL2
XTAL1
RST
8-bit microcontrollers with 80C51 core
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
V DD
002aaa543
15 of 77