LPC2132 PHILIPS [NXP Semiconductors], LPC2132 Datasheet - Page 12
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LPC2132
Manufacturer Part Number
LPC2132
Description
Single-chip 16/32-bit microcontrollers; 32/64/512 kB ISP/IAP Flash with 10-bit ADC and DAC
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.LPC2132.pdf
(41 pages)
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Philips Semiconductors
6. Functional description
9397 750 14868
Preliminary data sheet
6.1 Architectural overview
6.2 On-Chip Flash program memory
6.3 On-Chip static RAM
The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM architecture is based on
Reduced Instruction Set Computer (RISC) principles, and the instruction set and related
decode mechanism are much simpler than those of microprogrammed Complex
Instruction Set Computers. This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI-S processor also employs a unique architectural strategy known as
Thumb, which makes it ideally suited to high-volume applications with memory
restrictions, or applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI-S processor has two instruction sets:
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide up to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
The LPC2131/2132/2134/2136/2138 incorporate a 32 kB, 64 kB, 128 kB, 256 kB and
512 kB Flash memory system respectively. This memory may be used for both code and
data storage. Programming of the Flash memory may be accomplished in several ways. It
may be programmed In System via the serial port. The application program may also
erase and/or program the Flash while the application is running, allowing a great degree
of flexibility for data storage field firmware upgrades, etc. When the
LPC2131/2132/2134/2136/2138 on-chip bootloader is used, 32/64/128/256/500 kB of
Flash memory is available for user code.
The LPC2131/2132/2134/2136/2138 Flash memory provides a minimum of 100,000
erase/write cycles and 20 years of data-retention.
On-Chip static RAM may be used for code and/or data storage. The SRAM may be
accessed as 8-bits, 16-bits, and 32-bits. The LPC2131/2132/2134/2136/2138 provide
8/16/32 kB of static RAM.
•
•
The standard 32-bit ARM set.
A 16-bit Thumb set.
Rev. 02 — 15 April 2005
LPC2131/2132/2134/2136/2138
Single-chip 16/32-bit microcontrollers
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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