P80C652EBB PHILIPS [NXP Semiconductors], P80C652EBB Datasheet - Page 14

• Manufacturer Part Number: P80C652EBB
• Description: CMOS single-chip 8-bit microcontrollers
• Manufacturer: PHILIPS [NXP Semiconductors]

1. At 100 kbit/s. At other bit rates this value is inversely proportional to the bit-rate of 100 kbit/s.
2. Determined by the external bus-line capacitance and the external bus-line pull-resistor, this must be < 1 s.
3. Spikes on the SDA and SCL lines with a duration of less than 3 t
4. t
Phlips Semiconductors
AC ELECTRICAL CHARACTERISTICS – I
NOTES:
TIMING SIO1 (I
1997 Dec 05
(INPUT/OUTPUT)
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
HD;STA
LOW
HIGH
RC
FC
SU;DAT1
SU;DAT2
SU;DAT3
HD;DAT
SU;STA
SU;STO
BUF
RD
FD
(INPUT/OUTPUT)
CMOS single-chip 8-bit microcontrollers
SCL TIMING CHARACTERISTICS
SDA TIMING CHARACTERISTICS
SCL = 400pF.
interface meets the I
CLCL
SCL
SDA
= 1/f
START or repeated START condition
OSC
START condition hold time
SCL LOW time
SCL HIGH time
SCL rise time
SCL fall time
Data set-up time
SDA set-up time (before rep. START cond.)
SDA set-up time (before STOP cond.)
Data hold time
Repeated START set-up time
STOP condition set-up time
Bus free time
SDA rise time
SDA fall time
= one oscillator clock period at pin XTAL1. For 63ns (42ns) < t
2
C) INTERFACE
t
HD;STA
2
t
C-bus specification for bit-rates up to 100 kbit/s.
FD
t
t
LOW
RC
PARAMETER
t
RD
t
HIGH
t
FC
t
SU;DAT1
2
C INTERFACE
CLCL
t
HD;DAT
14
will be filtered out. Maximum capacitance on bus-lines SDA and
CLCL
repeated START condition
STOP condition
< 285ns (16MHz (24MHz) > f
14 t
16 t
14 t
14 t
14 t
14 t
INPUT
250ns
250ns
250ns
0.3 s
0.3 s
1 s
1 s
0ns
CLCL
CLCL
CLCL
CLCL
CLCL
CLCL
t
SU;DAT2
t
SU;STA
t
SU; STO
0.7 V
0.3 V
80C652/83C652
t
SU;DAT3
OSC
DD
DD
t
> 20 t
BUF
> 8 t
> 3.5MHz) the SI01
OUTPUT
> 8 t
> 4.0 s
> 4.7 s
> 4.0 s
< 0.3 s
> 4.7 s
> 4.0 s
> 4.7 s
< 0.3 s
> 1 s
CLCL
Product specification
CLCL
–
–
CLCL
0.7 V
0.3 V
2
2
START condition
1
– t
– t
1
1
1
3
1
1
1
3
DD
DD
FC
RD