LPC1776 NXP [NXP Semiconductors], LPC1776 Datasheet - Page 81

• Manufacturer Part Number: LPC1776
• Description: 32-bit ARM Cortex-M3 microcontroller
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 15.
C
LPC178X_7X
Objective data sheet
Symbol
T
Read cycle parameters
t
t
t
t
t
t
t
t
t
t
Write cycle parameters
t
t
t
t
t
t
t
t
t
t
t
t
CSLAV
CSLOEL
CSLBLSL
OELOEH
am
h(D)
CSHBLSH
CSHOEH
OEHANV
deact
CSLAV
CSLDV
CSLWEL
CSLBLSL
WELWEH
BLSLBLSH
WEHDNV
WEHEOW
BLSHDNV
WEHANV
deact
CSLBLSL
L
cy(clk)
= 30 pF, T
Dynamic characteristics: Static external memory interface
Parameter
clock cycle time
CS LOW to address valid
time
CS LOW to OE LOW time
CS LOW to BLS LOW time
OE LOW to OE HIGH time
memory access time
data input hold time
CS HIGH to BLS HIGH time PB = 1
CS HIGH to OE HIGH time
OE HIGH to address invalid
time
deactivation time
CS LOW to address valid
time
CS LOW to data valid time
CS LOW to WE LOW time
CS LOW to BLS LOW time
WE LOW to WE HIGH time
BLS LOW to BLS HIGH time PB = 1
WE HIGH to data invalid
time
WE HIGH to end of write
time
BLS HIGH to data invalid
time
WE HIGH to address invalid
time
deactivation time
CS LOW to BLS LOW
amb
11.2 External memory interface
=

40

[1]
C to 85
[2]
[2]

C, V
DD(REG)(3V3)
Conditions
RD
RD
RD
RD
RD
RD
RD
WR
WR
WR
WR
WR
WR
WR
PB = 1
PB = 1
WR
PB = 1
WR
All information provided in this document is subject to legal disclaimers.
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
; PB = 1
; PB =1
; PB = 1
; PB =1
; PB =1
; PB = 1
; PB = 0;
; PB = 0
= 3.0 V to 3.6 V. Values guaranteed by design.
Rev. 2 — 27 May 2011
[1]
[3]
[4]
[5]
Min
12.5
1.4
1.3 + T
WAITOEN
<tbd>
(WAITRD 
WAITOEN + 1) 
T
(WAITRD 
WAITOEN +1) 
T
0.1
<tbd>
<tbd>
<tbd>
1.4
1.5
1.4 + T
(1 + WAITWEN)
3.0
(WAITWR 
WAITWEN + 1) 
T
WAITWEN + 3) 
T
1.2 + T
<tbd> + T
1.4
1 + T
<tbd>
1.5
(WAITWR 
<tbd>
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
 1.0
 7.2
 1.0
 1.4
cy(clk)
cy(clk)
cy(clk)
cy(clk)


32-bit ARM Cortex-M3 microcontroller
Typ
-
2.0
2.0 + T
WAITOEN
<tbd>
(WAITRD 
WAITOEN + 1) 
T
(WAITRD 
WAITOEN +1) 
T
0.1
2.3
<tbd>
<tbd>
<tbd>
2.0
2.3
2.0 + T
(1 + WAITWEN)
2.3
(WAITWR 
WAITWEN + 1) 
T
(WAITWR 
WAITWEN + 3) 
T
1.8 + T
<tbd> + T
2.0
1.5 + T
<tbd>
<tbd>
cy(clk)
cy(clk)
cy(clk)
cy(clk)
 1.4
 10.5
 1.5
 2.0
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)


LPC178x/7x
Max
-
2.5
2.5 + T
WAITOEN
<tbd>
(WAITRD 
WAITOEN + 1) 
T
(WAITRD 
WAITOEN +1) 
T
0.1
3
<tbd>
<tbd>
<tbd>
2.5
2.9
2.5 + T
(1 + WAITWEN)
3.0
(WAITWR 
WAITWEN + 1) 
T
(WAITWR 
WAITWEN + 3) 
T
2.1 + T
<tbd> + T
2.7
1.7 + T
<tbd>
<tbd>
cy(clk)
cy(clk)
cy(clk)
cy(clk)
© NXP B.V. 2011. All rights reserved.
 1.6
 15.5
 1.7
 2.7
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)


81 of 117
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns