ST7FLITE02 STMICROELECTRONICS [STMicroelectronics], ST7FLITE02 Datasheet - Page 37
![no-image](/images/no-image-200.jpg)
ST7FLITE02
Manufacturer Part Number
ST7FLITE02
Description
8-BIT MICROCONTROLLER WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST7FLITE02.pdf
(125 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST7FLITE02Y0M6
Manufacturer:
ST
Quantity:
5 262
Company:
Part Number:
ST7FLITE02YDB6
Manufacturer:
STM
Quantity:
3 867
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
8.4.4 Register Description
SYSTEM INTEGRITY (SI) CONTROL/STATUS REGISTER (SICSR)
Read/Write
Reset Value: 0000 0x00 (0xh)
Bit 7:4 = Reserved, must be kept cleared.
Bit 3 = LOCKED PLL Locked Flag
This bit is set and cleared by hardware. It is set au-
tomatically when the PLL reaches its operating fre-
quency.
0: PLL not locked
1: PLL locked
Bit 2 = LVDRF LVD reset flag
This bit indicates that the last Reset was generat-
ed by the LVD block. It is set by hardware (LVD re-
set) and cleared by software (writing zero). See
WDGRF flag description in
details. When the LVD is disabled by OPTION
BYTE, the LVDRF bit value is undefined.
Bit 1 = AVDF Voltage Detector flag
This read-only bit is set and cleared by hardware.
Table 8. System Integrity Register Map and Reset Values
Address
7
0
(Hex.)
003Ah
0
SICSR
Reset Value
0
Register
Label
0
LOCK
ED
Section 11.1
7
0
LVDRF AVDF AVDIE
6
0
for more
0
5
0
If the AVDIE bit is set, an interrupt request is gen-
erated when the AVDF bit is set. Refer to
20
0: V
1: V
Bit 0 = AVDIE Voltage Detector interrupt enable
This bit is set and cleared by software. It enables
an interrupt to be generated when the AVDF flag is
set. The pending interrupt information is automati-
cally cleared when software enters the AVD inter-
rupt routine.
0: AVD interrupt disabled
1: AVD interrupt enabled
Application notes
The LVDRF flag is not cleared when another RE-
SET type occurs (external or watchdog), the
LVDRF flag remains set to keep trace of the origi-
nal failure.
In this case, a watchdog reset can be detected by
software while an external reset can not.
for additional details
DD
DD
4
0
over AVD threshold
under AVD threshold
LOCKED
3
0
LVDRF
ST7LITE0x, ST7LITESx
2
x
AVDF
1
0
AVDIE
Figure
37/125
0
0
1