MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 433

• Manufacturer Part Number: MC9S12E32CFU
• Description: HCS12 Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

13.3.2.16 Pulse Accumulator Flag Register (PAFLG)
Read: Anytime
Write: Anytime
When the TFFCA bit in the TSCR register is set, any access to the PACNT register will clear all the flags
in the PAFLG register.
Freescale Semiconductor
PAOVF
Reset
Field
PAIF
1
0
W
R
Pulse Accumulator Overflow Flag — Set when the 16-bit pulse accumulator overflows from 0xFFFF to 0x0000.
This bit is cleared automatically by a write to the PAFLG register with bit 1 set.
Pulse Accumulator Input edge Flag — Set when the selected edge is detected at the IOC7 input pin.In event
mode the event edge triggers PAIF and in gated time accumulation mode the trailing edge of the gate signal at
the IOC7 input pin triggers PAIF.
This bit is cleared by a write to the PAFLG register with bit 0 set.
Any access to the PACNT register will clear all the flags in this register when TFFCA bit in register TSCR(0x0006)
is set.
0
0
7
Unimplemented or Reserved
Figure 13-23. Pulse Accumulator Flag Register (PAFLG)
0
0
6
Table 13-20. PAFLG Field Descriptions
MC9S12E128 Data Sheet, Rev. 1.07
0
0
5
0
0
4
Description
0
0
3
Chapter 13 Timer Module (TIM16B4CV1)
0
0
2
PAOVF
0
1
PAIF
0
0
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