MC9S12E32CFU FREESCALE [Freescale Semiconductor, Inc], MC9S12E32CFU Datasheet - Page 434

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MC9S12E32CFU

Manufacturer Part Number
MC9S12E32CFU
Description
HCS12 Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Chapter 13 Timer Module (TIM16B4CV1)
13.3.2.17 Pulse Accumulators Count Registers (PACNT)
Read: Anytime
Write: Anytime
These registers contain the number of active input edges on its input pin since the last reset.
When PACNT overflows from 0xFFFF to 0x0000, the Interrupt flag PAOVF in PAFLG (0x0021) is set.
Full count register access should take place in one clock cycle. A separate read/write for high byte and low
byte will give a different result than accessing them as a word.
434
Reset
Reset
W
W
R
R
PACNT15
PACNT7
15
0
0
7
edge on the pulse accumulator input pin may miss the last count because the
input has to be synchronized with the bus clock first.
Reading the pulse accumulator counter registers immediately after an active
Figure 13-24. Pulse Accumulator Count Register High (PACNTH)
Figure 13-25. Pulse Accumulator Count Register Low (PACNTL)
PACNT14
PACNT6
14
0
0
6
PACNT13
PACNT5
MC9S12E128 Data Sheet, Rev. 1.07
13
0
0
5
PACNT12
PACNT4
NOTE
12
0
0
4
PACNT11
PACNT3
11
0
0
3
PACNT10
PACNT2
10
0
0
2
PACNT9
PACNT1
Freescale Semiconductor
0
0
9
1
PACNT8
PACNT0
0
0
0
0

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