LM79 NSC [National Semiconductor], LM79 Datasheet - Page 3

• Manufacturer Part Number: LM79
• Description: Microprocessor System Hardware Monitor
• Manufacturer: NSC [National Semiconductor]

IORD
IOWR
SYSCLK
D7–D0
V
GNDD
SMI__IN
Chassis
Intrusion
CC
Block Diagram
Pin Description
Name(s)
(+5V)
Pin
Number
4–11
Pin
12
13
14
15
1
2
3
Number
of Pins
1
1
1
8
1
1
1
1
Digital Input
Digital Input
Digital Input
Digital I/O
POWER
GROUND
Digital Input
Digital I/O
Type
An active low standard ISA bus I/O Read Control.
An active low standard ISA bus I/O Write Control.
The reference clock for the ISA bus. Typically ranges from 4.167 MHz to
8.33 MHz. The minimum clock frequency this input can handle is 1 Hz.
Bi-directional ISA bus Data lines. D0 corresponds to the low order bit,
with D7 the high order bit.
+5V V
Chainable SMI (System Management Interrupt) Input. This is an active
low input that propagates the SMI signal to the SMI output of the LM79
via SMI Mask Register Bit 6 and SMI enable Bit 1 of the Configuration
Register.
An active high input from an external circuit which latches a Chassis
Intrusion event. This line can go high without any clamping action
regardless of the powered state of the LM79. The LM79 provides an
internal open drain on this line, controlled by Bit 7 of NMI Mask Register
2, to provide a minimum 20 ms reset of this line.
(electolytic or tantalum) and 0.1 µF (ceramic) bypass capacitors.
Internally connected to all digital circuitry.
CC
3
power. Bypass with the parallel combination of 10 µF
Description
DS100036-3
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