AGL015V2-CS144 ACTEL [Actel Corporation], AGL015V2-CS144 Datasheet - Page 124
AGL015V2-CS144
Manufacturer Part Number
AGL015V2-CS144
Description
IGLOO Low-Power Flash FPGAs with Flash Freeze Technology
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.AGL015V2-CS144.pdf
(212 pages)
- Current page: 124 of 212
- Download datasheet (7Mb)
IGLOO DC and Switching Characteristics
Table 2-174 • RAM512X18
2 -1 1 0
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
F
Note:
AS
AH
ENS
ENH
DS
DH
CKQ1
CKQ2
WRO
CCKH
RSTBQ
REMRSTB
RECRSTB
MPWRSTB
CYC
MAX
For specific junction temperature and voltage supply levels, refer to
values.
Address setup time
Address hold time
REN_B, WEN_B setup time
REN_B, WEN_B hold time
Input data (DI) setup time
Input data (DI) hold time
Clock HIGH to new data valid on DO (output retained, WMODE = 0)
Clock HIGH to new data valid on DO (pipelined)
Address collision clk-to-clk delay for reliable read access after write on same address
Address collision clk-to-clk delay for reliable write access after write/read on same
address
RESET_B LOW to data out LOW on DO (flow through)
RESET_B LOW to data out LOW on DO (pipelined)
RESET_B removal
RESET_B recovery
RESET_B minimum pulse width
Clock cycle time
Maximum frequency
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
Description
A d v a n c e v 0. 5
CC
= 1.14 V
Table 2-7 on page 2-7
10.90
for derating
1.53
0.29
1.36
0.15
1.33
0.66
7.88
3.20
3.86
1.12
5.93
Std.
TBD
TBD
3.86
1.18
92
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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