AGL015V2-CS144 ACTEL [Actel Corporation], AGL015V2-CS144 Datasheet - Page 134

• Manufacturer Part Number: AGL015V2-CS144
• Description: IGLOO Low-Power Flash FPGAs with Flash Freeze Technology
• Manufacturer: ACTEL [Actel Corporation]

IGLOO DC and Switching Characteristics
2 -1 2 0
Previous Version
Advance v0.6
(November 2007)
Advance v0.6
(continued)
Advance v0.3
(August 2007)
Advance v0.2
(July 2007)
Advance v0.1
The
numbers.
In
Levels Applicable to Commercial and Industrial Conditions—Software Default
Settings, T
All AC Loading figures for single-ended I/O standards were changed from
Datapaths at 35 pF to 5 pF.
The
This document was previously in datasheet Advance v0.7. As a result of
moving to the handbook format, Actel has restarted the version numbers. The
new version number is Advance v0.1.
Table 2-4 • IGLOO CCC/PLL Specification and Table 2-5 • IGLOO CCC/PLL
Specification were updated.
The former Table 2-16 • Maximum I/O Frequency for Single-Ended and
Differential I/Os in All Banks in IGLOO Devices (maximum drive strength and
high slew selected) was removed.
The "During Flash*Freeze Mode" section was updated to include information
about the output of the I/O to the FPGA core
Table 2-31 • Flash*Freeze Pin Location in IGLOO Family Packages (device-
independent) was updated to add UC81 and CS281. Flash*Freeze pins were
assigned for CS81, CS121, and CS196.
Figure 2-40 • Flash*Freeze Mode Type 2 – Timing Diagram was updated to
modify the LSICC Signal.
Information regarding calculation of the quiescent supply current was added
to the "Quiescent Supply Current" section.
Table
Flash*Freeze Mode
Table 3-9 • Quiescent Supply Current (I
(VCC = 0 V)
Table 3-11 • Quiescent Supply Current (I
was updated.
Table 3-115 • Minimum and Maximum DC Input and Output Levels was
updated.
The "Power Conservation Techniques" section was updated to recommend
that unused I/O signals be left floating.
The CS81 and CS121 packages were added to Table 2-31 • Flash*Freeze Pin
Location in IGLOO Family Packages (device-independent).
The T
changed to T
Table 3-156 • JTAG 1532 was updated and Table 3-155 • JTAG 1532 is new.
Table 2-26 · Summary of Maximum and Minimum DC Input and Output
"1.2 V LVCMOS (JESD8-12A)" section
"Timing Model"
J
parameter in Table 3-2 • Recommended Operating Conditions was
3-8 • Quiescent
J
†
was changed to T
was updated.
A
, ambient temperature, and table notes 4–6 were added.
Changes in Current Version (Advance v0.5)
†
was updated.
was updated to be consistent with the revised timing
Supply
A d v a n c e v 0. 5
A
in notes 1 and 2.
Current
DD
is new.
DD
) Characteristics, IGLOO Sleep Mode
), No IGLOO Flash*Freeze Mode1
.
(I
DD
)
Characteristics,
IGLOO
3-104
Page
2-19,
2-19
2-24
2-59
2-20
2-57
2-61
2-55
3-58
2-51
2-61
N/A
N/A
N/A
3-6
3-6
3-6
3-7
3-2