AGL015V2-CS144 ACTEL [Actel Corporation], AGL015V2-CS144 Datasheet - Page 32
AGL015V2-CS144
Manufacturer Part Number
AGL015V2-CS144
Description
IGLOO Low-Power Flash FPGAs with Flash Freeze Technology
Manufacturer
ACTEL [Actel Corporation]
Datasheet
1.AGL015V2-CS144.pdf
(212 pages)
- Current page: 32 of 212
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IGLOO DC and Switching Characteristics
2 -1 8
Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage.
If the toggle rate of a net is 100%, this means that this net switches at half the clock frequency.
Below are some examples:
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled.
When nontristate output buffers are used, the enable rate should be 100%.
Table 2-22 • Toggle Rate Guidelines Recommended for Power Calculation
Table 2-23 • Enable Rate Guidelines Recommended for Power Calculation
Component
Component
1
2
1
2
3
•
•
The average toggle rate of a shift register is 100% because all flip-flop outputs toggle at
half of the clock frequency.
The average toggle rate of an 8-bit counter is 25%:
–
–
–
–
–
–
Bit 0 (LSB) = 100%
Bit 1
Bit 2
…
Bit 7 (MSB) = 0.78125%
Average toggle rate = (100% + 50% + 25% + 12.5% + . . . + 0.78125%) / 8
= 50%
= 25%
Toggle rate of VersaTile outputs
I/O buffer toggle rate
I/O output buffer enable rate
RAM enable rate for read operations
RAM enable rate for write operations
A d v a n c e v 0. 5
Definition
Definition
Guideline
Guideline
12.5%
12.5%
100%
10%
10%
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