ISPLSI1016EA LATTICE [Lattice Semiconductor], ISPLSI1016EA Datasheet - Page 11

• Manufacturer Part Number: ISPLSI1016EA
• Description: In-System Programmable High Density PLD
• Manufacturer: LATTICE [Lattice Semiconductor]

1. Pins have dual function capability which is software selectable.
Pin Description
I/O 0 - I/O 3
I/O 4 - I/O 7
I/O 8 - I/O 11
I/O 12 - I/O 15
I/O 16 - I/O 19
I/O 20 - I/O 23
I/O 24 - I/O 27
I/O 28 - I/O 31
GOE 0/IN 3
TDI
TMS
TDO
TCK
Y0
Y1/RESET
GND
VCC
VCCIO
NAME
1
1
15,
19,
25,
29,
37,
41,
2
14
36
24
33
11
35
1,
12,
13
PIN NUMBERS
3,
7,
16,
20,
26,
30,
38,
42,
23
34
PLCC
4,
8,
17,
21,
27,
31,
39,
43,
5,
9,
18,
22,
28,
32,
40,
44,
10
6,
13,
19,
23,
31,
35,
41,
PIN NUMBERS
9,
1,
40
8
30
18
27
5
29
17,
6,
7
10,
14,
20,
24,
32,
36,
42,
TQFP
2,
39
28
11,
15,
21,
25,
33,
37,
43,
3,
12,
16,
22,
26,
34,
38,
44,
4
Input/Output Pins - These are the general purpose I/O pins used by the logic
array.
This is a dual function pin. It can be used either as Global Output Enable for
all I/O cells or it can be used as a dedicated input pin.
Input - Functions as an input pin to load programming data into the device and
also used as one of the two control pins for the ispJTAG state machine.
Input - Controls the operation of the ISP state machine.
Output - Functions as an output pin to read serial shift register data.
Input - Functions as a clock pin for the Serial Shift Register.
Dedicated Clock input. This clock input is connected to one of the clock inputs
of all of the GLBs on the device.
This pin performs two functions:
Dedicated Clock input. This clock input is brought into the clock distribution
network, and can optionally be routed to any GLB on the device.
Active Low (0) Reset pin which resets all of the GLB and I/O registers in the
device.
Ground (GND)
VCC
Supply voltage for output drivers, 5V or 3.3V.
11
Specifications ispLSI 1016EA
DESCRIPTION
Table 2-0002C/1016EA