X3100 Xicor, X3100 Datasheet - Page 26
X3100
Manufacturer Part Number
X3100
Description
3 or 4 Cell Li-Ion Battery Protection and Monitor IC
Manufacturer
Xicor
Datasheet
1.X3100.pdf
(40 pages)
- Current page: 26 of 40
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X3100/X3101 – Preliminary Information
REV 1.1.8 12/10/02
EEPROM Read Sequence (EEREAD)
When reading from the X3100 or X3101 EEPROM
memory, CS is first pulled LOW to select the device. The 8-
bit EEREAD instruction is transmitted to the X3100 or
X3101, followed by the 16-bit address, of which the last
9 bits are used (bits [15:9] specified to be zeroes). After
the EEREAD opcode and address are sent, the data
stored in the memory at the selected address is shifted
out on the SO line. The data stored in memory at the next
Figure 15. EEPROM (EEREAD) Read Operation Sequence
SCK
CS
SO
SI
High Impedance
0
EEREAD Instruction
1
2
(1 Byte)
3
4
5
6
7
15 14
8
Byte Address (2 Byte)
www.xicor.com
9
address can be read sequentially by continuing to provide
clock pulses. The address is automatically incremented to
the next higher address after each byte of data is shifted
out. When the highest address is reached (01FFh), the
address counter rolls over to address 0000h, allowing
the read cycle to be continued indefinitely. The read
operation is terminated by taking CS HIGH. Refer to the
EEPROM
illustrated in Figure 15.
20 21 22 23 24 25 26 27 28 29 30
3
2
1
0
Read
7
Characteristics subject to change without notice.
6
(EEREAD)
5
4
Data Out
3
2
operation
1
31
0
sequence
26 of 40
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