ST72T311 ST Microelectronics, ST72T311 Datasheet - Page 92

• Manufacturer Part Number: ST72T311
• Description: 8-BIT MCU WITH 8 TO 16K OTP/EPROM
• Manufacturer: ST Microelectronics

ST72E311 ST72T311
PERIPHERAL CHARACTERISTICS (Cont’d)
Measurement points are V
Figure 47. SPI Master Timing Diagram CPHA=0, CPOL=0
92/100
Ref.
10
11
12
13
1
2
3
4
5
6
7
8
9
(OUTPUT)
(OUTPUT)
Symbol
(INPUT)
(INPUT)
t
MOSI
t
MISO
t
SPI_H
SPI_L
t
t
f
t
t
t
Lead
t
t
Hold
SCK
Rise
SPI
SPI
Lag
Fall
SU
t
t
Dis
t
H
A
V
SS
SPI frequency
SPI clock periode
Enable lead time
Enable lag time
Clock (SCK) high time
Clock (SCK) low time
Data set-up time
Data hold time (inputs)
Access time (time to data active
from high impedance state)
Disable time (hold time to high im-
pedance state)
Data valid
Data hold time (outputs)
Rise time
(20% V
Fall time
(70% V
DD
DD
10
OL
6
to 70% V
to 20% V
, V
Parameter
D7-OUT
OH
D7-IN
, V
7
DD
DD
4
11
IL
, C
, C
and V
Serial Peripheral Interface
L
L
= 200pF)
= 200pF)
IH
in the SPI Timing Diagram
5
Master
Slave
Master
Slave
Slave
Slave
Master
Slave
Master
Slave
Master
Slave
Master
Slave
Slave
Master (before capture edge)
Slave (after enable edge)
Master (before capture edge)
Slave (after enable edge)
Outputs: SCK,MOSI,MISO
Inputs: SCK,MOSI,MISO, SS
Outputs: SCK,MOSI,MISO
Inputs: SCK,MOSI,MISO, SS
D6-IN
D6-OUT
1
Condition
13
D0-OUT
D0-IN
1/128
Min.
0.25
0.25
12
120
120
100
100
100
100
100
100
dc
90
90
4
2
0
0
Value
Max.
VR000109
120
240
120
100
100
100
100
1/4
1/2
Unit
f
t
t
t
CPU
CPU
CPU
CPU
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s