AM79C960KCW Advanced Micro Devices, AM79C960KCW Datasheet - Page 75
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AM79C960KCW
Manufacturer Part Number
AM79C960KCW
Description
PCnetTM-ISA Single-Chip Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C960KCW.pdf
(127 pages)
- Current page: 75 of 127
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3
2
1
0
ISACSR4: LED0 Status (Link Integrity)
Bit
15
(Bit 1)
ASEL XMAUSEL
0
0
1
1
XMAUSEL
EADISEL
AWAKE
LNKST
ASEL
Name
(Bit 0)
0
1
0
1
Software; interface selection is
done through the PORTSEL[1:0]
bits in CSR15.
Jumper; interface selection is
done through the MAUSEL pin.
Automatic (default)
Reserved
tMMR3 and tMMW3 are nomi-
nally set to 100 ns.
EADI Select. Enables EADI
match mode. XMAUSEL must be
0.
Auto-Wake. If LNKST is set and
AWAKE = “1”, the 10BASE-T
receive circuitry is active during
sleep and listens for Link Pulses.
LED0 indicates Link Status and
goes active if the 10BASE-T port
comes of out of “link fail” state.
This LED0 pin can be used by ex-
ternal circuitry to re-enable the
PCnet-ISA
other devices.
When AWAKE = “0”, the Auto-
Wake circuity is disabled. This bit
only has meaning when the
10BASE-T network interface is
selected.
Auto Select. When set, the
PCnet-ISA controller will auto-
matically select the operating
media interface port.
Reset.
External MAU Select allows the
hardware selection of AUI or
10BASE-T interfaces when set.
When cleared, the interface is
selected by software. Cleared by
RESET.
ISACSR4 is a non-programma-
ble register that uses one bit to
reflect the status of the LED0 pin.
This pin defaults to twisted pair
MAU Link Status (LNKST) and is
not programmable.
LNKST is a read-only register bit
that indicates whether the Link
Status LED is asserted. When
LNKST is read as zero, the Link
Status LED is not asserted.
When LNKST is read as one, the
Selection Mode
Description
controller
P R E L I M I N A R Y
Set by
and/or
Am79C960
14-0
ISACSR5: LED1 Status
Bit
15
14-8
7
6-5
4
3
2
1
0
RVPOL E
LEDOUT
XMT E
RCV E
COL E
JAB E
Name
RES
RES
RES
PSE
Link Status LED is asserted, indi-
cating good 10BASE-T integrity.
Reserved locations. Written as 0,
read as undefined.
ISACSR5 controls the func-
tion(s)
displays. Multiple functions can
be simultaneously enabled on
this LED pin. The LED display will
indicate the logical OR of the en-
abled
defaults to Receive Status (RCV)
with pulse stretcher enabled
(PSE = 1) and is fully program-
mable.
Indicates
stretched) state of the function(s)
generated. Read only.
Reserved locations. Read and
written as zero.
Pulse Stretcher Enable. Extends
the LED illumination for each en-
abled function occurrence.
0 is disabled, 1 is enabled.
Reserved locations. Read and
written as zero.
Enable Transmit Status Signal.
Indicates PCnet-ISA controller
transmit activity .
0 disables the signal, 1 enables
the signal.
Enable Receive Polarity Signal.
Enables LED pin assertion when
receive polarity is correct on the
10BASE-T port. Clearing the bit
indicates this function is to
be ignored.
Enable Receive Status Signal.
Indicates receive activity on the
network.
0 disables the signal, 1 enables
the signal.
Enable Jabber Signal. Indicates
the PCnet-ISA controller is jab-
bering on the network.
0 disables the signal, 1 enables
the signal.
Enable Collision Signal. Indi-
cates collision activity on the
network.
0 disables the signal, 1 enables
the signal.
that
functions.
Description
the
the
current
LED1
AMD
ISACSR5
1-417
(non-
pin
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